文件名称:sdramcontroller

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.28mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 文*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

最完整的SDRAM控制IP核,包括源代码,仿真文件,以及IP核描述文件,包你用得上-SDRAM control of the most complete IP core, including source code, simulation, as well as IP core descr iption files, it can be helpful
(系统自动生成,下载前可以参看下载内容)

下载文件列表

sdr sdram controller

....................\sdr_sdram.pdf

....................\verilog

....................\.......\doc

....................\.......\...\readme.txt

....................\.......\...\sdr_sdram.pdf

....................\.......\model

....................\.......\.....\mt48lc8m16a2.v

....................\.......\route

....................\.......\.....\PLL1.v

....................\.......\.....\sdr_sdram.csf

....................\.......\.....\sdr_sdram.esf

....................\.......\.....\sdr_sdram.vqm

....................\.......\simulation

....................\.......\..........\modelsim.ini

....................\.......\..........\readme.txt

....................\.......\..........\sdr_sdram_tb.v

....................\.......\..........\work

....................\.......\..........\....\altclklock

....................\.......\..........\....\..........\verilog.psm

....................\.......\..........\....\..........\_primary.dat

....................\.......\..........\....\..........\_primary.vhd

....................\.......\..........\....\command

....................\.......\..........\....\.......\verilog.psm

....................\.......\..........\....\.......\_primary.dat

....................\.......\..........\....\.......\_primary.vhd

....................\.......\..........\....\control_interface

....................\.......\..........\....\.................\verilog.psm

....................\.......\..........\....\.................\_primary.dat

....................\.......\..........\....\.................\_primary.vhd

....................\.......\..........\....\mt48lc8m16a2

....................\.......\..........\....\............\verilog.psm

....................\.......\..........\....\............\_primary.dat

....................\.......\..........\....\............\_primary.vhd

....................\.......\..........\....\pll1

....................\.......\..........\....\....\verilog.psm

....................\.......\..........\....\....\_primary.dat

....................\.......\..........\....\....\_primary.vhd

....................\.......\..........\....\sdr_data_path

....................\.......\..........\....\.............\verilog.psm

....................\.......\..........\....\.............\_primary.dat

....................\.......\..........\....\.............\_primary.vhd

....................\.......\..........\....\sdr_sdram

....................\.......\..........\....\.........\verilog.psm

....................\.......\..........\....\.........\_primary.dat

....................\.......\..........\....\.........\_primary.vhd

....................\.......\..........\....\sdr_sdram_tb

....................\.......\..........\....\............\verilog.psm

....................\.......\..........\....\............\_primary.dat

....................\.......\..........\....\............\_primary.vhd

....................\.......\..........\....\_info

....................\.......\source

....................\.......\......\altclklock.v

....................\.......\......\Command.v

....................\.......\......\compile_all.v

....................\.......\......\control_interface.v

....................\.......\......\Params.v

....................\.......\......\PLL1.v

....................\.......\......\sdr_data_path.v

....................\.......\......\sdr_sdram.v

....................\.......\synthesis

....................\.......\.........\synplicity

....................\.......\.........\..........\sdr_sdram.prj

....................\vhdl

....................\....\doc

....................\....\...\readme.txt

....................\....\...\sdr_sdram.pdf

....................\....\model

....................\....\.....\io_utils.vhd

....................\....\.....\mt48lc8m16a2.vhd

....................\....\.....\mt48lc8m16a2.zip

....................\....\.....\mti_pkg.vhd

....................\....\.....\stdlogar.vhd

....................\....\.....\util1164.vhd

....................\....\route

....................\....\.....\pll1.vhd

....................\....\.....\sdr_sdram.csf

....................\...

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台,提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度更多...
  • 请直接用浏览器下载本站内容,不要使用迅雷之类的下载软件,用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*主  题:
*内  容:
*验 证 码:

源码中国 www.ymcn.org