文件名称:clock10
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篮球24秒计数器。用Verilog语言编写，在maxplus2中编译运行。适用于大部分FPGA开发板，但必须更改引脚分配。-24 seconds counter basketball. Verilog language used in compiling maxplus2 run. Applicable to most FPGA development board, but must change the pin assignment.
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下载文件列表
clock10
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.......\clock.acf
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.......\clock1.sym
.......\clock24.acf
.......\clock24.fit
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.......\clock24.hex
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.......\clock60.acf
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.......\clock60.sym
.......\clock_top.acf
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.......\baoshi.acf
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.......\baoshi2.acf
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.......\clock.acf
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.......\clock1.acf
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.......\clock24.acf
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.......\clock24.gdf
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.......\clock24.sof
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.......\clock24.ttf
.......\clock60.acf
.......\clock60.fit
.......\clock60.gdf
.......\clock60.hex
.......\clock60.hif
.......\clock60.mmf
.......\clock60.ndb
.......\clock60.pin
.......\clock60.pof
.......\clock60.rpt
.......\clock60.scf
.......\clock60.snf
.......\clock60.sof
.......\clock60.sym
.......\clock_top.acf
.......\clock_top.fit
.......\clock_top.gdf
.......\clock_top.hex
.......\clock_top.hif
.......\clock_top.mmf
.......\clock_top.ndb
.......\clock_top.pin
.......\clock_top.pof
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.......\clock_top.scf
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.......\clock_top.sof