文件名称:adc_sensor

  • 所属分类:
  • 单片机(51,AVR,MSP430等)
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 119kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • ra***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

adc is fpga latform code for testing temparature sense
相关搜索: fpga
ADC
adc
fpga

(系统自动生成,下载前可以参看下载内容)

下载文件列表

adc_sensor\.lso

..........\adc.prj

..........\adc.stx

..........\adc.v

..........\adc.xst

..........\adc_sensor.ise

..........\adc_sensor.ise_ISE_Backup

..........\adc_sensor.restore

..........\adc_summary.html

..........\pressure.prj

..........\pressure.stx

..........\pressure.v

..........\pressure.xst

..........\speed.prj

..........\speed.stx

..........\speed.v

..........\speed.xst

..........\temparature.prj

..........\temparature.stx

..........\temparature.v

..........\temparature.xst

..........\test.ant

..........\test.fdo

..........\test.jhd

..........\test.tbw

..........\test.udo

..........\test.xwv

..........\test.xwv_bak

..........\test1.ant

..........\test1.fdo

..........\test1.jhd

..........\test1.tbw

..........\test1.udo

..........\test1.xwv

..........\test1.xwv_bak

..........\test2.ant

..........\test2.fdo

..........\test2.jhd

..........\test2.tbw

..........\test2.udo

..........\test2.xwv

..........\test2.xwv_bak

..........\test2_bencher.prj

..........\test3.ant

..........\test3.fdo

..........\test3.jhd

..........\test3.tbw

..........\test3.tfw

..........\test3.udo

..........\test3.xwv

..........\test3.xwv_bak

..........\test3_bencher.prj

..........\test_bencher.prj

..........\transcript

..........\vsim.wlf

..........\work\adc\verilog.psm

..........\....\...\_primary.dat

..........\....\...\_primary.vhd

..........\....\glbl\verilog.psm

..........\....\....\_primary.dat

..........\....\....\_primary.vhd

..........\....\pressure\verilog.psm

..........\....\........\_primary.dat

..........\....\........\_primary.vhd

..........\....\speed\verilog.psm

..........\....\.....\_primary.dat

..........\....\.....\_primary.vhd

..........\....\temperature\verilog.psm

..........\....\...........\_primary.dat

..........\....\...........\_primary.vhd

..........\....\..st\verilog.psm

..........\....\....\_primary.dat

..........\....\....\_primary.vhd

..........\....\....1\verilog.psm

..........\....\.....\_primary.dat

..........\....\.....\_primary.vhd

..........\....\....2\verilog.psm

..........\....\.....\_primary.dat

..........\....\.....\_primary.vhd

..........\....\....3\verilog.psm

..........\....\.....\_primary.dat

..........\....\.....\_primary.vhd

..........\....\_info

..........\xst\work\hdllib.ref

..........\...\....\vlg11\pressure.bin

..........\...\....\...2D\speed.bin

..........\...\....\....E\temparature.bin

..........\...\....\...50\adc.bin

..........\...\....\....2\temperature.bin

..........\_xmsgs\xst.xmsgs

..........\xst\work\vlg11

..........\...\....\vlg2D

..........\...\....\vlg2E

..........\...\....\vlg50

..........\...\....\vlg52

..........\work\adc

..........\....\glbl

..........\....\pressure

..........\....\speed

..........\....\temperature

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