文件名称:mmu_uart
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uart RS232 VHDL Code
(系统自动生成,下载前可以参看下载内容)
下载文件列表
mmu_uart
........\baud_cnt
........\........\RTL
........\........\...\baud_cnt.vhd
........\........\sim
........\........\...\baud_cnt_sim.tcl
........\........\TB
........\........\..\baud_cnt_tb.vhd
........\........\XST
........\........\...\baud_cnt
........\........\...\........\baud_cnt.npl
........\mmu_uart_top
........\............\.DS_Store
__MACOSX
........\mmu_uart
........\........\mmu_uart_top
........\........\............\._.DS_Store
mmu_uart\mmu_uart_top\RTL
........\............\...\mmu_uart_top.vhd
........\............\XST
........\............\...\mmu_uart_top
........\............\...\............\mmu_uart_top.npl
........\rx
........\..\RTL
........\..\...\RX.vhd
........\..\sim
........\..\...\rx_sim.tcl
........\..\TB
........\..\..\rx_tb.vhd
........\..\XST
........\..\...\rx.npl
........\s3_loop_test
........\............\README.txt
........\............\RTL
........\............\...\s3_loop_test.vhd
........\............\XST
........\............\...\s3_loop_test
........\............\...\............\s3_loop_test.npl
........\............\...\s3_loop_test.ucf
........\tx
........\..\RTL
........\..\...\tx.vhd
........\..\sim
........\..\...\tx_sim.tcl
........\..\TB
........\..\..\tx_tb.vhd
........\..\XST
........\..\...\tx
........\..\...\..\tx.npl
........\baud_cnt
........\........\RTL
........\........\...\baud_cnt.vhd
........\........\sim
........\........\...\baud_cnt_sim.tcl
........\........\TB
........\........\..\baud_cnt_tb.vhd
........\........\XST
........\........\...\baud_cnt
........\........\...\........\baud_cnt.npl
........\mmu_uart_top
........\............\.DS_Store
__MACOSX
........\mmu_uart
........\........\mmu_uart_top
........\........\............\._.DS_Store
mmu_uart\mmu_uart_top\RTL
........\............\...\mmu_uart_top.vhd
........\............\XST
........\............\...\mmu_uart_top
........\............\...\............\mmu_uart_top.npl
........\rx
........\..\RTL
........\..\...\RX.vhd
........\..\sim
........\..\...\rx_sim.tcl
........\..\TB
........\..\..\rx_tb.vhd
........\..\XST
........\..\...\rx.npl
........\s3_loop_test
........\............\README.txt
........\............\RTL
........\............\...\s3_loop_test.vhd
........\............\XST
........\............\...\s3_loop_test
........\............\...\............\s3_loop_test.npl
........\............\...\s3_loop_test.ucf
........\tx
........\..\RTL
........\..\...\tx.vhd
........\..\sim
........\..\...\tx_sim.tcl
........\..\TB
........\..\..\tx_tb.vhd
........\..\XST
........\..\...\tx
........\..\...\..\tx.npl