文件名称:asias_dds
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一个简易的信号源，具有多种波形发生功能还有扫频，调制，频率计等相关功能-My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wave and saw wave with different frequency
相关搜索： verilog
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下载文件列表
asias_dds\06_7_12_12_30_main.c
.........\06_7_12_23_30_main.c
.........\06_7_12_23_45_main.c
.........\ad9851
.........\ad9851.hex
.........\ad9851.lnp
.........\ad9851.m51
.........\ad9851.Opt
.........\ad9851.plg
.........\ad9851.Uv2
.........\ad9851_Opt.Bak
.........\ad9851_Uv2.Bak
.........\delay_1s.c
.........\main.c
.........\main.LST
.........\main.OBJ
.........\runing_led.hex
.........\startup.a51
.........\startup.lst
.........\STARTUP.OBJ
.........\testing_main.c
.........\复件 main.c
.........\复件 testing_main.c
asias_dds
.........\06_7_12_23_30_main.c
.........\06_7_12_23_45_main.c
.........\ad9851
.........\ad9851.hex
.........\ad9851.lnp
.........\ad9851.m51
.........\ad9851.Opt
.........\ad9851.plg
.........\ad9851.Uv2
.........\ad9851_Opt.Bak
.........\ad9851_Uv2.Bak
.........\delay_1s.c
.........\main.c
.........\main.LST
.........\main.OBJ
.........\runing_led.hex
.........\startup.a51
.........\startup.lst
.........\STARTUP.OBJ
.........\testing_main.c
.........\复件 main.c
.........\复件 testing_main.c
asias_dds