文件名称:SPI_Wishbone_Controller
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FPGA SPI总线硬件描述语言Verilog下的实现-FPGA SPI bus under the Verilog hardware descr iption language to achieve
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下载文件列表
SPI Wishbone Controller\Docs\rd1044.pdf
.......................\....\RD1044_readme.txt
.......................\Project\XO\spi_wb.lpf
.......................\.......\..\SPI_wb.syn
.......................\.......\..\spi_wb_tb1_tf.udo
.......................\.......\..\spi_wb_tb1_tff.udo
.......................\.......\..\spi_wb_tb1_tfr.udo
.......................\Source\Spi_wb.v
.......................\......\Spi_wb_top.vhd
.......................\Testbench\Spi_wb_tb1.v
.......................\Project\XO
.......................\Docs
.......................\Project
.......................\Source
.......................\Testbench
SPI Wishbone Controller
.......................\....\RD1044_readme.txt
.......................\Project\XO\spi_wb.lpf
.......................\.......\..\SPI_wb.syn
.......................\.......\..\spi_wb_tb1_tf.udo
.......................\.......\..\spi_wb_tb1_tff.udo
.......................\.......\..\spi_wb_tb1_tfr.udo
.......................\Source\Spi_wb.v
.......................\......\Spi_wb_top.vhd
.......................\Testbench\Spi_wb_tb1.v
.......................\Project\XO
.......................\Docs
.......................\Project
.......................\Source
.......................\Testbench
SPI Wishbone Controller