给出了一种用于H.264变换尺寸全搜索快匹配算法的运动估计电路的改进结构，并完成了VLSI设计。通过脉动阵列和全流水线的设计，达到最高的数据重用率、最小的I/O引脚和100 的硬件计算效率。-An improved architecture for H.264 full-pel motion estimation using variable block size full-search block-matching algorithm is proposed in this paper. To obtain the highest data reuse efficiency and minimum I/O pin count while achieving 100　hardware efficiency, a systolic array and full pipeline architure is adopted.