文件名称:Hardware_Speedup_DSP_FPGA
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现场可编程门阵列(FPGA)已经不再单纯应用在芯片与系统之间的直接互联层,在软件无线电(SDR)中,FPGA逐渐用做通用运算架构来实现硬件加速单元,在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器(GPP)、数字信号处理器(DSP)和FPGA。而且,FPGA架构可以结合专用硬件加速单元,用来卸载GPP或DSP。软核微处理器可以结合定制逻辑,扩展其内核,也可以将分立的硬件加速协处理器添加到系统中。此外,还可将通用布线资源放在FPGA中,这些硬件加速单元可以并行运行,进一步增强系统的整体运算输出能力-Field programmable gate array (FPGA) is no longer a simple chip and system used in the direct interconnection between the layers, in the Software Defined Radio (SDR) in, FPGA increasingly used as general-purpose computing architecture to achieve hardware acceleration units to reduce costs in and power consumption based on the performance upgrade. SDR modem to achieve a typical general-purpose processor, including (GPP), digital signal processor (DSP) and FPGA. Moreover, FPGA architecture can be combined with dedicated hardware acceleration units to uninstall GPP or DSP. Soft-core microprocessors can combine custom logic and to expand its core, it can be the separation of hardware-accelerated co-processor added to the system. In addition, resources can also be placed on general-purpose FPGA routing, these hardware acceleration units can be run in parallel, to further enhance the overall computing system, the output capacity
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在软件无线电调制解调器功能中使用硬件加速单元.pdf