文件名称:cpu(FinalWithYS)
介绍说明－－下载内容均来自于网络，请自行研究使用
verilog实现的八位CPU，包括乘法、除法以及多种寻址方式。代码中包括测试模块，可以直接在试验箱上运行。-verilog to achieve the eight CPU, including multiplication, division, as well as addressing a variety of ways. Code, including test modules, can be run directly in the chamber.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
AC.V
ALU.v
AR.v
CPU.ucf
CPU.v
cputest.txt
CU.v
div.v
GR.v
memory.v
multiplier.v
mux2.v
mux4.v
mux8.v
PC.v
register.v
SP.v
TestBench.v
ALU.v
AR.v
CPU.ucf
CPU.v
cputest.txt
CU.v
div.v
GR.v
memory.v
multiplier.v
mux2.v
mux4.v
mux8.v
PC.v
register.v
SP.v
TestBench.v