文件名称:prawn
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Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
-Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
-Prawn is a simple eight-bit microprocessor based on the sample processor described in Chapter 9 of "VHDL : Analysis and Modeling of Digital Systems"by Z. Navabi, McGraw-Hill,Inc. 1993. We have added some features such as interrupt, stack and some conditions for conditional branch to the example in the book.
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下载文件列表
prawn
.....\cmd.i
.....\control.vhd
.....\cpu.cr.mti
.....\cpu.mpf
.....\cpu.vhd
.....\cpu.vhdl
.....\cpu.vhdl.bak
.....\lib.vhdl
.....\lib.vhdl.bak
.....\Makefile
.....\mem.vhdl
.....\mem.vhdl.bak
.....\MVL7_functions.vhdl
.....\opencores-code.txt
.....\opencores-code.txt.bak
.....\par.cr.mti
.....\par.mpf
.....\parwan_tester.vhdl
.....\prawn.cpp
.....\prawn.cpp.bak
.....\prawn.doc
.....\prawn.vhdl
.....\p_v.vhd.bak
.....\p_v.vhdl
.....\p_v.vhdl.bak
.....\README
.....\sim.vhdl
.....\sim.vhdl.bak
.....\synthesis_utilities.vhdl
.....\synthesis_utilities.vhdl.bak
.....\transcript
.....\tst1book.vhdl
.....\tst2book.vhdl
.....\tstop1.vhdl
.....\tstop2.vhdl
.....\tstop3.vhdl
.....\tstop4.vhdl
.....\tstop5.vhdl
.....\tstop7.vhdl
.....\tstop8.vhdl
.....\tstop9.vhdl
.....\tstopA.vhdl
.....\tstopB.vhdl
.....\tstopC.vhdl
.....\types.vhdl
.....\vsim.wlf
.....\work
.....\....\alu_operations
.....\....\..............\_primary.dat
.....\....\..............\_vhdl.asm
.....\....\cpu
.....\....\...\behavioral.asm
.....\....\...\behavioral.dat
.....\....\...\_primary.dat
.....\....\lib
.....\....\...\body.asm
.....\....\...\body.dat
.....\....\...\_primary.dat
.....\....\...\_vhdl.asm
.....\....\mem
.....\....\...\behavioral.asm
.....\....\...\behavioral.dat
.....\....\...\_primary.dat
.....\....\mvl7_functions
.....\....\..............\body.asm
.....\....\..............\body.dat
.....\....\..............\_primary.dat
.....\....\..............\_vhdl.asm
.....\....\sim
.....\....\...\input_output.asm
.....\....\...\input_output.dat
.....\....\...\_primary.dat
.....\....\synthesis_utilities
.....\....\...................\body.asm
.....\....\...................\body.dat
.....\....\...................\_primary.dat
.....\....\...................\_vhdl.asm
.....\....\types
.....\....\.....\body.asm
.....\....\.....\body.dat
.....\....\.....\_primary.dat
.....\....\.....\_vhdl.asm
.....\....\_info
.....\ZCOMPONE.VHD
.....\ZENTITIE.VHD
.....\ZTYPE.VHD
.....\zycad_PDF.pdf
.....\cmd.i
.....\control.vhd
.....\cpu.cr.mti
.....\cpu.mpf
.....\cpu.vhd
.....\cpu.vhdl
.....\cpu.vhdl.bak
.....\lib.vhdl
.....\lib.vhdl.bak
.....\Makefile
.....\mem.vhdl
.....\mem.vhdl.bak
.....\MVL7_functions.vhdl
.....\opencores-code.txt
.....\opencores-code.txt.bak
.....\par.cr.mti
.....\par.mpf
.....\parwan_tester.vhdl
.....\prawn.cpp
.....\prawn.cpp.bak
.....\prawn.doc
.....\prawn.vhdl
.....\p_v.vhd.bak
.....\p_v.vhdl
.....\p_v.vhdl.bak
.....\README
.....\sim.vhdl
.....\sim.vhdl.bak
.....\synthesis_utilities.vhdl
.....\synthesis_utilities.vhdl.bak
.....\transcript
.....\tst1book.vhdl
.....\tst2book.vhdl
.....\tstop1.vhdl
.....\tstop2.vhdl
.....\tstop3.vhdl
.....\tstop4.vhdl
.....\tstop5.vhdl
.....\tstop7.vhdl
.....\tstop8.vhdl
.....\tstop9.vhdl
.....\tstopA.vhdl
.....\tstopB.vhdl
.....\tstopC.vhdl
.....\types.vhdl
.....\vsim.wlf
.....\work
.....\....\alu_operations
.....\....\..............\_primary.dat
.....\....\..............\_vhdl.asm
.....\....\cpu
.....\....\...\behavioral.asm
.....\....\...\behavioral.dat
.....\....\...\_primary.dat
.....\....\lib
.....\....\...\body.asm
.....\....\...\body.dat
.....\....\...\_primary.dat
.....\....\...\_vhdl.asm
.....\....\mem
.....\....\...\behavioral.asm
.....\....\...\behavioral.dat
.....\....\...\_primary.dat
.....\....\mvl7_functions
.....\....\..............\body.asm
.....\....\..............\body.dat
.....\....\..............\_primary.dat
.....\....\..............\_vhdl.asm
.....\....\sim
.....\....\...\input_output.asm
.....\....\...\input_output.dat
.....\....\...\_primary.dat
.....\....\synthesis_utilities
.....\....\...................\body.asm
.....\....\...................\body.dat
.....\....\...................\_primary.dat
.....\....\...................\_vhdl.asm
.....\....\types
.....\....\.....\body.asm
.....\....\.....\body.dat
.....\....\.....\_primary.dat
.....\....\.....\_vhdl.asm
.....\....\_info
.....\ZCOMPONE.VHD
.....\ZENTITIE.VHD
.....\ZTYPE.VHD
.....\zycad_PDF.pdf