文件名称:VHDLToVerilog
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VHDL实例，小小的一个试验例子，希望对新手有帮战-VHDL example of a small example of a pilot, I hope there is help on the new war
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下载文件列表
VHDL_to_Verilog
...............\example
...............\.......\precalc_fsm.bak
...............\.......\precalc_fsm.vhd
...............\.......\reg10.bak
...............\.......\reg10.ER
...............\.......\reg10.log
...............\.......\reg10.v
...............\.......\reg10.vhd
...............\.......\reg768.bak
...............\.......\reg768.vhd
...............\.......\S95.log
...............\.......\sp_spec.bak
...............\.......\sp_spec.vhd
...............\test3232hv.log
...............\test3232hv.v
...............\test3232hv.vhd
...............\vhdl2vl.dll
...............\vhdl2vl.ini
...............\vhdl2vl.txt
...............\vvToForm.exe
...............\example
...............\.......\precalc_fsm.bak
...............\.......\precalc_fsm.vhd
...............\.......\reg10.bak
...............\.......\reg10.ER
...............\.......\reg10.log
...............\.......\reg10.v
...............\.......\reg10.vhd
...............\.......\reg768.bak
...............\.......\reg768.vhd
...............\.......\S95.log
...............\.......\sp_spec.bak
...............\.......\sp_spec.vhd
...............\test3232hv.log
...............\test3232hv.v
...............\test3232hv.vhd
...............\vhdl2vl.dll
...............\vhdl2vl.ini
...............\vhdl2vl.txt
...............\vvToForm.exe