文件名称:Rs232sourcecode
介绍说明－－下载内容均来自于网络，请自行研究使用
Working RS232 controller running at 9600 Hz.
Consist of Transmitter and Receiver Module.
Tested in FPGA Spartan 3
Included files for testing at FPGA
- Scan4digit .vhd - to display at 7 sgement display
- D4to7 .vhd - Convert HEX decimal to ASCII code.
-Working RS232 controller running at 9600 Hz.
Consist of Transmitter and Receiver Module.
Tested in FPGA Spartan 3
Included files for testing at FPGA
- Scan4digit .vhd- to display at 7 sgement display
- D4to7 .vhd- Convert HEX decimal to ASCII code.
Consist of Transmitter and Receiver Module.
Tested in FPGA Spartan 3
Included files for testing at FPGA
- Scan4digit .vhd - to display at 7 sgement display
- D4to7 .vhd - Convert HEX decimal to ASCII code.
-Working RS232 controller running at 9600 Hz.
Consist of Transmitter and Receiver Module.
Tested in FPGA Spartan 3
Included files for testing at FPGA
- Scan4digit .vhd- to display at 7 sgement display
- D4to7 .vhd- Convert HEX decimal to ASCII code.
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(系统自动生成,下载前可以参看下载内容)
下载文件列表
Rs232 source code
.................\d4to7.vhd
.................\rs232_rxd.vhd
.................\rs232_txd.vhd
.................\rs232_wrapper.vhd
.................\scan4digit.vhd
.................\tb_rs232.vhd
.................\toplevelrs232.vhd
.................\d4to7.vhd
.................\rs232_rxd.vhd
.................\rs232_txd.vhd
.................\rs232_wrapper.vhd
.................\scan4digit.vhd
.................\tb_rs232.vhd
.................\toplevelrs232.vhd