文件名称:qiangdaqi
介绍说明－－下载内容均来自于网络，请自行研究使用
用verilog编写的抢答器，当主持人宣布“开始比赛”，系统初始化，选手进入“抢答状态”。当某一选手首先按下抢答开关时，相应的指示灯亮，此时抢答器不再接受其他输入信号。电路具有累计分控制（分别用４个４位选手的积分——十六进制数），由主持人控制“加分”。“加分”加分完毕，开始下一轮抢答。电路还可以设有回答问题时间控制。
-Answer using Verilog prepared, and when the host announced the " start game" , the system initialization, players enter the " Answer status." When a player first of all, press the Answer the switch, the corresponding indicator light, when the Answer Explorer no longer accept other input signals. Circuit with a total of sub-control (separately with four players four points- hexadecimal number), by the host control " points." " Add points" add hours after beginning the next round of Answer. Circuit can also be equipped with time control to answer questions.
-Answer using Verilog prepared, and when the host announced the " start game" , the system initialization, players enter the " Answer status." When a player first of all, press the Answer the switch, the corresponding indicator light, when the Answer Explorer no longer accept other input signals. Circuit with a total of sub-control (separately with four players four points- hexadecimal number), by the host control " points." " Add points" add hours after beginning the next round of Answer. Circuit can also be equipped with time control to answer questions.
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下载文件列表
qiangdaqi
.........\.lso
.........\adder.v
.........\ban.v
.........\control.ngc
.........\control.ngr
.........\control.prj
.........\control.stx
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.........\control_stx.prj
.........\control_vhdl.prj
.........\counter.prj
.........\counter.stx
.........\counter.v
.........\counter.xst
.........\counter_vhdl.prj
.........\dchu.prj
.........\dchu.stx
.........\dchu.v
.........\dchu.xst
.........\dchu_vhdl.prj
.........\display.prj
.........\display.stx
.........\display.v
.........\display.xst
.........\display_vhdl.prj
.........\fen.prj
.........\fen.stx
.........\fen.v
.........\fen.xst
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.........\full.v
.........\isim
.........\....\temp
.........\....\....\hdllib.ref
.........\....\....\hdpdeps.ref
.........\....\....\vlg10
.........\....\....\.....\counter.bin
.........\....\....\vlg1E
.........\....\....\.....\display.bin
.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
.........\....\....\.....\qiangdaqi.bin
.........\....\....\vlg61
.........\....\....\.....\control.bin
.........\....\work
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.........\....\....\.......\control.h
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.........\....\....\.......\.....\control.obj
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.........\....\....\.......\.....\display.obj
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.........\....\....\....\.....\glbl.obj
.........\....\....\hdllib.ref
.........\....\....\hdpdeps.ref
.........\....\....\q
.........\....\....\.\mingw
.........\....\....\.\.....\q.obj
.........\....\....\.\q.h
.........\....\....\.\xsimq.cpp
.........\....\....\qiangdaqi
.........\....\....\.........\mingw
.........\....\....\.........\.....\qiangdaqi.obj
.........\....\....\.........\qiangdaqi.h
.........\....\....\vlg10
.........\....\....\.....\counter.bin
.........\....\....\vlg1E
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.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
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.........\....\....\vlg61
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.........\....\....\vlg71
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.........\isim.cmd
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.........\.............\_1
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.........\q.ant
.........\q.jhd
.........\q.tbw
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.........\q.xwv
.........\q.xwv_bak
.........\.lso
.........\adder.v
.........\ban.v
.........\control.ngc
.........\control.ngr
.........\control.prj
.........\control.stx
.........\control.v
.........\control.xst
.........\control_stx.prj
.........\control_vhdl.prj
.........\counter.prj
.........\counter.stx
.........\counter.v
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.........\counter_vhdl.prj
.........\dchu.prj
.........\dchu.stx
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.........\dchu.xst
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.........\display.prj
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.........\full.v
.........\isim
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.........\....\....\vlg10
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.........\....\....\vlg1E
.........\....\....\.....\display.bin
.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
.........\....\....\.....\qiangdaqi.bin
.........\....\....\vlg61
.........\....\....\.....\control.bin
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.........\....\....\control
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.........\....\....\.......\mingw
.........\....\....\.......\.....\control.obj
.........\....\....\counter
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.........\....\....\.......\mingw
.........\....\....\.......\.....\counter.obj
.........\....\....\display
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.........\....\....\.......\mingw
.........\....\....\.......\.....\display.obj
.........\....\....\glbl
.........\....\....\....\glbl.h
.........\....\....\....\mingw
.........\....\....\....\.....\glbl.obj
.........\....\....\hdllib.ref
.........\....\....\hdpdeps.ref
.........\....\....\q
.........\....\....\.\mingw
.........\....\....\.\.....\q.obj
.........\....\....\.\q.h
.........\....\....\.\xsimq.cpp
.........\....\....\qiangdaqi
.........\....\....\.........\mingw
.........\....\....\.........\.....\qiangdaqi.obj
.........\....\....\.........\qiangdaqi.h
.........\....\....\vlg10
.........\....\....\.....\counter.bin
.........\....\....\vlg1E
.........\....\....\.....\display.bin
.........\....\....\vlg2D
.........\....\....\.....\glbl.bin
.........\....\....\vlg57
.........\....\....\.....\qiangdaqi.bin
.........\....\....\vlg61
.........\....\....\.....\control.bin
.........\....\....\vlg71
.........\....\....\.....\q.bin
.........\isim.cmd
.........\isim.hdlsourcefiles
.........\isim.log
.........\isim.tmp_save
.........\.............\_1
.........\isimwavedata.xwv
.........\prjname.lso
.........\q.ant
.........\q.jhd
.........\q.tbw
.........\q.tfw
.........\q.xwv
.........\q.xwv_bak