FPGA驱动LED显示:运用硬件描述语言（如VHDL）设计一个显示译码驱动器，即将要显示的字符译成8段码。由于FPGA有相当多的引脚端资源，如果显示的位数N较少，可以直接使用静态显示方式，即将每一个数码管都分别连接到不同的8个引脚线上，共需要8×N条引脚线控制.-FPGA-driven LED display: the use of hardware descr iption languages (such as VHDL) design a display decoder driver, about to show the characters to 8 yards. Because there is a considerable number of FPGA-pin-side resources, if shown the median N less, you can direct the use of a static display, the upcoming digital tube are each separately connected to a different 8-pin line, required a total of 8 × N Article pin line control.