文件名称:VHDL
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常见的输入输出及存储器件（ram及fifo）vhdl实现-The vhdl source codes of ram,fifo.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VHDL
....\fifo_test.vhd
....\freefifo.vhd
....\ramlib_quartus.vhd
....\ramlib_sim.vhd
....\ramlib_xil.vhd
....\test_sim.vhd
....\test_sim_dp2.vhd
....\test_synth.vhd
....\test_synth_dp2.vhd
....\fifo_test.vhd
....\freefifo.vhd
....\ramlib_quartus.vhd
....\ramlib_sim.vhd
....\ramlib_xil.vhd
....\test_sim.vhd
....\test_sim_dp2.vhd
....\test_synth.vhd
....\test_synth_dp2.vhd