文件名称:i2c_core
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I2C core 及testbench（verilog）-I2C core and testbench [verilog]
(系统自动生成,下载前可以参看下载内容)
下载文件列表
bench
.....\i2c_slave_model.v
.....\spi_slave_model.v
.....\tst_bench_top.v
.....\wb_master_model.v
verilog
.......\i2c_master_bit_ctrl.v
.......\i2c_master_byte_ctrl.v
.......\i2c_master_defines.v
.......\i2c_master_top.v
.......\timescale.v
.....\i2c_slave_model.v
.....\spi_slave_model.v
.....\tst_bench_top.v
.....\wb_master_model.v
verilog
.......\i2c_master_bit_ctrl.v
.......\i2c_master_byte_ctrl.v
.......\i2c_master_defines.v
.......\i2c_master_top.v
.......\timescale.v