文件名称:clk
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现代电子系统课程设计
基于DDS技术利用VHDL设计并制作一个数字式移相信号发生器。
(1)基本要求:
a.频率范围:1Hz~4kHz,频率步进为1Hz,输出频率可预置。
b.A、B两路正弦信号输出,10位输出数据宽度
c.相位差范围为0~359°,步进为1.4°,相位差值可预置。
d.数字显示预置的频率(10进制)、相位差值。
(2)发挥部分
a.修改设计,增加幅度控制电路(如可以用一乘法器控制输出幅度)。
b.输出幅度峰峰值0.1~3.0V,步距0.1V,显示预置值。
-Modern electronic system design is based on DDS technology courses use VHDL to design and produce a digital shift Signal Generator. (1) the basic requirements: a. Frequency range: 1Hz ~ 4kHz, frequency step for the 1Hz, output frequency can be preset. b. A, B two sinusoidal signal output, 10-bit output data width c. Phase difference range of 0 ~ 359 °, stepping to 1.4 °, the phase difference value can be preset. d. Figures show that the frequency of Preferences (10 M), phase difference value. (2) to play a part of a. Modify the design to increase the rate of control circuit (for example, could use a multiplier to control the output rate). b. Peak-to-peak output rate of 0.1 ~ 3.0V, step 0.1V, show preset value.
基于DDS技术利用VHDL设计并制作一个数字式移相信号发生器。
(1)基本要求:
a.频率范围:1Hz~4kHz,频率步进为1Hz,输出频率可预置。
b.A、B两路正弦信号输出,10位输出数据宽度
c.相位差范围为0~359°,步进为1.4°,相位差值可预置。
d.数字显示预置的频率(10进制)、相位差值。
(2)发挥部分
a.修改设计,增加幅度控制电路(如可以用一乘法器控制输出幅度)。
b.输出幅度峰峰值0.1~3.0V,步距0.1V,显示预置值。
-Modern electronic system design is based on DDS technology courses use VHDL to design and produce a digital shift Signal Generator. (1) the basic requirements: a. Frequency range: 1Hz ~ 4kHz, frequency step for the 1Hz, output frequency can be preset. b. A, B two sinusoidal signal output, 10-bit output data width c. Phase difference range of 0 ~ 359 °, stepping to 1.4 °, the phase difference value can be preset. d. Figures show that the frequency of Preferences (10 M), phase difference value. (2) to play a part of a. Modify the design to increase the rate of control circuit (for example, could use a multiplier to control the output rate). b. Peak-to-peak output rate of 0.1 ~ 3.0V, step 0.1V, show preset value.
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下载文件列表
clk
...\db
...\..\mimaclock.asm.qmsg
...\..\mimaclock.cbx.xml
...\..\mimaclock.cmp.cdb
...\..\mimaclock.cmp.hdb
...\..\mimaclock.cmp.rdb
...\..\mimaclock.cmp.tdb
...\..\mimaclock.cmp0.ddb
...\..\mimaclock.db_info
...\..\mimaclock.eco.cdb
...\..\mimaclock.fit.qmsg
...\..\mimaclock.hier_info
...\..\mimaclock.hif
...\..\mimaclock.map.cdb
...\..\mimaclock.map.hdb
...\..\mimaclock.map.qmsg
...\..\mimaclock.pre_map.cdb
...\..\mimaclock.pre_map.hdb
...\..\mimaclock.psp
...\..\mimaclock.rtlv.hdb
...\..\mimaclock.rtlv_sg.cdb
...\..\mimaclock.rtlv_sg_swap.cdb
...\..\mimaclock.sgdiff.cdb
...\..\mimaclock.sgdiff.hdb
...\..\mimaclock.signalprobe.cdb
...\..\mimaclock.sld_design_entry.sci
...\..\mimaclock.sld_design_entry_dsc.sci
...\..\mimaclock.syn_hier_info
...\..\mimaclock.tan.qmsg
...\..\mimaclock_cmp.qrpt
...\mimaclock.asm.rpt
...\mimaclock.cdf
...\mimaclock.done
...\mimaclock.fit.eqn
...\mimaclock.fit.rpt
...\mimaclock.fit.summary
...\mimaclock.flow.rpt
...\mimaclock.map.eqn
...\mimaclock.map.rpt
...\mimaclock.map.summary
...\mimaclock.pin
...\mimaclock.pof
...\mimaclock.qpf
...\mimaclock.qsf
...\mimaclock.sof
...\mimaclock.tan.rpt
...\mimaclock.tan.summary
...\mimaclock.vhd
...\db
...\..\mimaclock.asm.qmsg
...\..\mimaclock.cbx.xml
...\..\mimaclock.cmp.cdb
...\..\mimaclock.cmp.hdb
...\..\mimaclock.cmp.rdb
...\..\mimaclock.cmp.tdb
...\..\mimaclock.cmp0.ddb
...\..\mimaclock.db_info
...\..\mimaclock.eco.cdb
...\..\mimaclock.fit.qmsg
...\..\mimaclock.hier_info
...\..\mimaclock.hif
...\..\mimaclock.map.cdb
...\..\mimaclock.map.hdb
...\..\mimaclock.map.qmsg
...\..\mimaclock.pre_map.cdb
...\..\mimaclock.pre_map.hdb
...\..\mimaclock.psp
...\..\mimaclock.rtlv.hdb
...\..\mimaclock.rtlv_sg.cdb
...\..\mimaclock.rtlv_sg_swap.cdb
...\..\mimaclock.sgdiff.cdb
...\..\mimaclock.sgdiff.hdb
...\..\mimaclock.signalprobe.cdb
...\..\mimaclock.sld_design_entry.sci
...\..\mimaclock.sld_design_entry_dsc.sci
...\..\mimaclock.syn_hier_info
...\..\mimaclock.tan.qmsg
...\..\mimaclock_cmp.qrpt
...\mimaclock.asm.rpt
...\mimaclock.cdf
...\mimaclock.done
...\mimaclock.fit.eqn
...\mimaclock.fit.rpt
...\mimaclock.fit.summary
...\mimaclock.flow.rpt
...\mimaclock.map.eqn
...\mimaclock.map.rpt
...\mimaclock.map.summary
...\mimaclock.pin
...\mimaclock.pof
...\mimaclock.qpf
...\mimaclock.qsf
...\mimaclock.sof
...\mimaclock.tan.rpt
...\mimaclock.tan.summary
...\mimaclock.vhd