文件名称:VerilogHDL_design_rule
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自己在设计中的总结的设计要点，其中经历了几个项目，把其中的心得里路在其中，希望对各位同学和同事有帮助-Themselves in the design summary of the design features, which has gone through several projects, which experience the mile in which you want to help students and colleagues
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Verilog HDL设计的要点.doc