文件名称:fifos
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通用的ｆｉｆｏ设计，带有ｔｅｓｔｂｅｎｃｈ，和ｄｅｓｉｇｎ＿ｆｌｏｗ-Fifo generic design, with a testbench, and design_flow
相关搜索： FIFOs
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generic_fifos
.............\bench
.............\.....\CVS
.............\.....\...\Entries
.............\.....\...\Repository
.............\.....\...\Root
.............\.....\verilog
.............\.....\.......\CVS
.............\.....\.......\...\Entries
.............\.....\.......\...\Repository
.............\.....\.......\...\Root
.............\.....\.......\test_bench_top.v
.............\CVS
.............\...\Entries
.............\...\Repository
.............\...\Root
.............\doc
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\README.txt
.............\rtl
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\verilog
.............\...\.......\CVS
.............\...\.......\...\Entries
.............\...\.......\...\Repository
.............\...\.......\...\Root
.............\...\.......\generic_fifo_dc.v
.............\...\.......\generic_fifo_dc_gray.v
.............\...\.......\generic_fifo_lfsr.v
.............\...\.......\generic_fifo_sc_a.v
.............\...\.......\generic_fifo_sc_b.v
.............\...\.......\lfsr.v
.............\...\.......\timescale.v
.............\sim
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\rtl_sim
.............\...\.......\bin
.............\...\.......\...\CVS
.............\...\.......\...\...\Entries
.............\...\.......\...\...\Repository
.............\...\.......\...\...\Root
.............\...\.......\...\Makefile
.............\...\.......\CVS
.............\...\.......\...\Entries
.............\...\.......\...\Repository
.............\...\.......\...\Root
.............\...\.......\run
.............\...\.......\...\CVS
.............\...\.......\...\...\Entries
.............\...\.......\...\...\Repository
.............\...\.......\...\...\Root
.............\...\.......\...\waves
.............\...\.......\...\.....\CVS
.............\...\.......\...\.....\...\Entries
.............\...\.......\...\.....\...\Repository
.............\...\.......\...\.....\...\Root
.............\...\.......\...\.....\waves.do
.............\bench
.............\.....\CVS
.............\.....\...\Entries
.............\.....\...\Repository
.............\.....\...\Root
.............\.....\verilog
.............\.....\.......\CVS
.............\.....\.......\...\Entries
.............\.....\.......\...\Repository
.............\.....\.......\...\Root
.............\.....\.......\test_bench_top.v
.............\CVS
.............\...\Entries
.............\...\Repository
.............\...\Root
.............\doc
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\README.txt
.............\rtl
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\verilog
.............\...\.......\CVS
.............\...\.......\...\Entries
.............\...\.......\...\Repository
.............\...\.......\...\Root
.............\...\.......\generic_fifo_dc.v
.............\...\.......\generic_fifo_dc_gray.v
.............\...\.......\generic_fifo_lfsr.v
.............\...\.......\generic_fifo_sc_a.v
.............\...\.......\generic_fifo_sc_b.v
.............\...\.......\lfsr.v
.............\...\.......\timescale.v
.............\sim
.............\...\CVS
.............\...\...\Entries
.............\...\...\Repository
.............\...\...\Root
.............\...\rtl_sim
.............\...\.......\bin
.............\...\.......\...\CVS
.............\...\.......\...\...\Entries
.............\...\.......\...\...\Repository
.............\...\.......\...\...\Root
.............\...\.......\...\Makefile
.............\...\.......\CVS
.............\...\.......\...\Entries
.............\...\.......\...\Repository
.............\...\.......\...\Root
.............\...\.......\run
.............\...\.......\...\CVS
.............\...\.......\...\...\Entries
.............\...\.......\...\...\Repository
.............\...\.......\...\...\Root
.............\...\.......\...\waves
.............\...\.......\...\.....\CVS
.............\...\.......\...\.....\...\Entries
.............\...\.......\...\.....\...\Repository
.............\...\.......\...\.....\...\Root
.............\...\.......\...\.....\waves.do