文件名称:lab5
- 所属分类：
- 其他嵌入式/单片机内容
- 资源属性：
- [C/C++] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 6.46mb
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- 0次
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基于Xilinx-XUPV2P开发平台的嵌入式系统实验例程：实验5高级应用程序编写-Xilinx-XUPV2P-based development platform for embedded systems experimental routines: Experimental Advanced Application Programming 5
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lab5
....\automake.log
....\bitinit.log
....\blkdiagram
....\..........\MdtXdsSVG_Render.css
....\..........\svg10.dtd
....\..........\system.html
....\..........\system.svg
....\code
....\....\executable.elf
....\....\system.c
....\....\TestApp_Memory_linker_script.ld.bak
....\data
....\....\system.ucf
....\drivers
....\.......\my_led_v1_00_a
....\.......\..............\data
....\.......\..............\....\my_led_v2_1_0.mdd
....\.......\..............\....\my_led_v2_1_0.tcl
....\.......\..............\src
....\.......\..............\...\Makefile
....\.......\..............\...\my_led.c
....\.......\..............\...\my_led.h
....\.......\..............\...\my_led_selftest.c
....\etc
....\...\bitgen.ut
....\...\download.cmd
....\...\fast_runtime.opt
....\hdl
....\...\dcm_0_wrapper.vhd
....\...\delay_wrapper.vhd
....\...\dip_push_wrapper.vhd
....\...\elaborate
....\...\.........\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_1_bram_elaborate.v
....\...\.........\plb_bram_if_cntlr_2_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_2_bram_elaborate.v
....\...\jtagppc_0_wrapper.vhd
....\...\my_led_0_wrapper.vhd
....\...\opb_intc_0_wrapper.vhd
....\...\opb_wrapper.vhd
....\...\plb2opb_wrapper.vhd
....\...\plb_bram_if_cntlr_1_bram_wrapper.v
....\...\plb_bram_if_cntlr_1_wrapper.vhd
....\...\plb_bram_if_cntlr_2_bram_wrapper.v
....\...\plb_bram_if_cntlr_2_wrapper.vhd
....\...\plb_wrapper.vhd
....\...\ppc405_0_wrapper.vhd
....\...\ppc405_1_wrapper.vhd
....\...\reset_block_wrapper.vhd
....\...\rs232_uart_1_wrapper.vhd
....\...\system.v
....\implementation
....\..............\bitgen.ut
....\..............\cache
....\..............\.....\cache.cat
....\..............\.....\dcm_0_wrapper.ngc
....\..............\.....\delay_wrapper.ngc
....\..............\.....\dip_push_wrapper.ngc
....\..............\.....\jtagppc_0_wrapper.ngc
....\..............\.....\my_led_0_wrapper.ngc
....\..............\.....\opb_intc_0_wrapper.ngc
....\..............\.....\opb_wrapper.ngc
....\..............\.....\plb2opb_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_1_bram_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_1_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_2_bram_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_2_wrapper.ngc
....\..............\.....\plb_wrapper.ngc
....\..............\.....\ppc405_0_wrapper.ngc
....\..............\.....\ppc405_1_wrapper.ngc
....\..............\.....\reset_block_wrapper.ngc
....\..............\.....\rs232_uart_1_wrapper.ngc
....\..............\dcm_0_wrapper
....\..............\.............\dcm_0_wrapper.ngc
....\..............\dcm_0_wrapper.ngc
....\..............\delay_wrapper
....\..............\.............\delay_wrapper.ngc
....\..............\delay_wrapper.ngc
....\..............\dip_push_wrapper
....\..............\................\dip_push_wrapper.ngc
....\..............\dip_push_wrapper.ngc
....\..............\download.bit
....\..............\fpga.flw
....\..............\jtagppc_0_wrapper
....\..............\.................\jtagppc_0_wrapper.ngc
....\..............\jtagppc_0_wrapper.ngc
....\..............\my_led_0_wrapper
....\..............\................\my_led_0_wrapper.ngc
....\..............\my_led_0_wrapper.ngc
....\..............\netlist.lst
....\..............\opb_intc_0_wrapper
....\..............\..................\opb_intc_0_wrapper.ngc
....\..............\opb_intc_0_wrapper.ngc
....\..............\opb_wrapper
....\automake.log
....\bitinit.log
....\blkdiagram
....\..........\MdtXdsSVG_Render.css
....\..........\svg10.dtd
....\..........\system.html
....\..........\system.svg
....\code
....\....\executable.elf
....\....\system.c
....\....\TestApp_Memory_linker_script.ld.bak
....\data
....\....\system.ucf
....\drivers
....\.......\my_led_v1_00_a
....\.......\..............\data
....\.......\..............\....\my_led_v2_1_0.mdd
....\.......\..............\....\my_led_v2_1_0.tcl
....\.......\..............\src
....\.......\..............\...\Makefile
....\.......\..............\...\my_led.c
....\.......\..............\...\my_led.h
....\.......\..............\...\my_led_selftest.c
....\etc
....\...\bitgen.ut
....\...\download.cmd
....\...\fast_runtime.opt
....\hdl
....\...\dcm_0_wrapper.vhd
....\...\delay_wrapper.vhd
....\...\dip_push_wrapper.vhd
....\...\elaborate
....\...\.........\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_1_bram_elaborate.v
....\...\.........\plb_bram_if_cntlr_2_bram_elaborate_v1_00_a
....\...\.........\..........................................\hdl
....\...\.........\..........................................\...\verilog
....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_2_bram_elaborate.v
....\...\jtagppc_0_wrapper.vhd
....\...\my_led_0_wrapper.vhd
....\...\opb_intc_0_wrapper.vhd
....\...\opb_wrapper.vhd
....\...\plb2opb_wrapper.vhd
....\...\plb_bram_if_cntlr_1_bram_wrapper.v
....\...\plb_bram_if_cntlr_1_wrapper.vhd
....\...\plb_bram_if_cntlr_2_bram_wrapper.v
....\...\plb_bram_if_cntlr_2_wrapper.vhd
....\...\plb_wrapper.vhd
....\...\ppc405_0_wrapper.vhd
....\...\ppc405_1_wrapper.vhd
....\...\reset_block_wrapper.vhd
....\...\rs232_uart_1_wrapper.vhd
....\...\system.v
....\implementation
....\..............\bitgen.ut
....\..............\cache
....\..............\.....\cache.cat
....\..............\.....\dcm_0_wrapper.ngc
....\..............\.....\delay_wrapper.ngc
....\..............\.....\dip_push_wrapper.ngc
....\..............\.....\jtagppc_0_wrapper.ngc
....\..............\.....\my_led_0_wrapper.ngc
....\..............\.....\opb_intc_0_wrapper.ngc
....\..............\.....\opb_wrapper.ngc
....\..............\.....\plb2opb_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_1_bram_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_1_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_2_bram_wrapper.ngc
....\..............\.....\plb_bram_if_cntlr_2_wrapper.ngc
....\..............\.....\plb_wrapper.ngc
....\..............\.....\ppc405_0_wrapper.ngc
....\..............\.....\ppc405_1_wrapper.ngc
....\..............\.....\reset_block_wrapper.ngc
....\..............\.....\rs232_uart_1_wrapper.ngc
....\..............\dcm_0_wrapper
....\..............\.............\dcm_0_wrapper.ngc
....\..............\dcm_0_wrapper.ngc
....\..............\delay_wrapper
....\..............\.............\delay_wrapper.ngc
....\..............\delay_wrapper.ngc
....\..............\dip_push_wrapper
....\..............\................\dip_push_wrapper.ngc
....\..............\dip_push_wrapper.ngc
....\..............\download.bit
....\..............\fpga.flw
....\..............\jtagppc_0_wrapper
....\..............\.................\jtagppc_0_wrapper.ngc
....\..............\jtagppc_0_wrapper.ngc
....\..............\my_led_0_wrapper
....\..............\................\my_led_0_wrapper.ngc
....\..............\my_led_0_wrapper.ngc
....\..............\netlist.lst
....\..............\opb_intc_0_wrapper
....\..............\..................\opb_intc_0_wrapper.ngc
....\..............\opb_intc_0_wrapper.ngc
....\..............\opb_wrapper