文件名称:wire
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分析集成电路中线间电容的一个小例子，主要在H-spice上仿真。-Analysis of integrated circuits between the capacitance of the center line of a small example, mainly in the H-spice simulation.
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下载文件列表
wire
....\wire.ic0
....\wire.lis
....\wire.pa0
....\WIRE.SAV
....\........\1.cfg
....\wire.sp
....\wire.st0
....\wire.tr0
....\wiredelay.ic0
....\wiredelay.lis
....\wiredelay.mt0
....\wiredelay.pa0
....\wiredelay.sp
....\wiredelay.st0
....\wiredelay.tr0
....\wire.ic0
....\wire.lis
....\wire.pa0
....\WIRE.SAV
....\........\1.cfg
....\wire.sp
....\wire.st0
....\wire.tr0
....\wiredelay.ic0
....\wiredelay.lis
....\wiredelay.mt0
....\wiredelay.pa0
....\wiredelay.sp
....\wiredelay.st0
....\wiredelay.tr0