文件名称:DSD
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digital system design
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DSD
...\24dcase
...\.......\24dcase.ntrc_log
...\.......\dec24c.cmd_log
...\.......\dec24c.ngc
...\.......\dec24c.ngr
...\.......\dec24c.stx
...\.......\dec24c.syr
...\.......\dec24c.vhd
...\.......\dec24c.xst
...\.......\dec24c_summary.html
...\.......\dec24c_tbw.ano
...\.......\dec24c_tbw.ant
...\.......\dec24c_tbw.jhd
...\.......\dec24c_tbw.tbw
...\.......\dec24c_tbw.vhw
...\.......\dec24c_tbw.xwv
...\.......\dec24c_tbw.xwv_bak
...\.......\dec24c_tbw_beh.prj
...\.......\dec24c_tbw_bencher.prj
...\.......\dec24c_tbw_gen.prj
...\.......\isim
...\.......\....\work
...\.......\....\....\dec24c
...\.......\....\....\......\behavioral.h
...\.......\....\....\......\mingw
...\.......\....\....\......\.....\behavioral.obj
...\.......\....\....\dec24c_tbw
...\.......\....\....\..........\mingw
...\.......\....\....\..........\.....\testbench_arch.obj
...\.......\....\....\..........\testbench_arch.h
...\.......\....\....\..........\xsimtestbench_arch.cpp
...\.......\....\....\hdllib.ref
...\.......\....\....\hdpdeps.ref
...\.......\....\....\sub00
...\.......\....\....\.....\vhpl00.vho
...\.......\....\....\.....\vhpl01.vho
...\.......\....\....\.....\vhpl02.vho
...\.......\....\....\.....\vhpl03.vho
...\.......\isim.hdlsourcefiles
...\.......\isim.log
...\.......\isim.tmp_save
...\.......\.............\_1
...\.......\pepExtractor.prj
...\.......\xst
...\.......\...\dump.xst
...\.......\...\........\dec24c.prj
...\.......\...\........\..........\ntrc.scr
...\.......\...\work
...\.......\...\....\hdllib.ref
...\.......\...\....\hdpdeps.ref
...\.......\...\....\sub00
...\.......\...\....\.....\vhpl00.vho
...\.......\...\....\.....\vhpl01.vho
...\.......\_xmsgs
...\.......\......\fuse.xmsgs
...\.......\......\vhpcomp.xmsgs
...\.......\......\xst.xmsgs
...\.......\__ISE_repository_24dcase.ise_.lock
...\2to4decoder
...\...........\2to4decoder.ntrc_log
...\...........\2to4decoder.stx
...\...........\2to4decoder.vhd
...\...........\2to4decoder.xst
...\...........\2to4decoder_summary.html
...\...........\2to4decoder_vhdl.prj
...\...........\decoder24.cmd_log
...\...........\decoder24.fdo
...\...........\decoder24.ngc
...\...........\decoder24.ngr
...\...........\decoder24.stx
...\...........\decoder24.syr
...\...........\decoder24.udo
...\...........\decoder24.xst
...\...........\decoder24_summary.html
...\...........\decoder24_tbw.ant
...\...........\decoder24_tbw.fdo
...\...........\decoder24_tbw.jhd
...\...........\decoder24_tbw.tbw
...\...........\decoder24_tbw.udo
...\...........\decoder24_tbw.vhw
...\...........\decoder24_tbw.xwv
...\...........\decoder24_tbw.xwv_bak
...\...........\decoder24_tbw_beh.prj
...\...........\decoder24_tbw_bencher.prj
...\...........\isim
...\...........\....\work
...\...........\....\....\decoder24
...\...........\....\....\.........\behavioral.h
...\...........\....\....\.........\mingw
...\...........\....\....\.........\.....\behavioral.obj
...\...........\....\....\decoder24_tbw
...\...........\....\....\.............\mingw
...\...........\....\....\.............\.....\testbench_arch.obj
...\...........\....\....\.............\testbench_arch.h
...\...........\....\....\.............\xsimtestbench_arch.cpp
...\...........\....\....\hdllib.ref
...\...........\....\....\hdpdeps.ref
...\...........\....\....\sub00
...\...........\....\....\.....\vhpl00.vho
...\24dcase
...\.......\24dcase.ntrc_log
...\.......\dec24c.cmd_log
...\.......\dec24c.ngc
...\.......\dec24c.ngr
...\.......\dec24c.stx
...\.......\dec24c.syr
...\.......\dec24c.vhd
...\.......\dec24c.xst
...\.......\dec24c_summary.html
...\.......\dec24c_tbw.ano
...\.......\dec24c_tbw.ant
...\.......\dec24c_tbw.jhd
...\.......\dec24c_tbw.tbw
...\.......\dec24c_tbw.vhw
...\.......\dec24c_tbw.xwv
...\.......\dec24c_tbw.xwv_bak
...\.......\dec24c_tbw_beh.prj
...\.......\dec24c_tbw_bencher.prj
...\.......\dec24c_tbw_gen.prj
...\.......\isim
...\.......\....\work
...\.......\....\....\dec24c
...\.......\....\....\......\behavioral.h
...\.......\....\....\......\mingw
...\.......\....\....\......\.....\behavioral.obj
...\.......\....\....\dec24c_tbw
...\.......\....\....\..........\mingw
...\.......\....\....\..........\.....\testbench_arch.obj
...\.......\....\....\..........\testbench_arch.h
...\.......\....\....\..........\xsimtestbench_arch.cpp
...\.......\....\....\hdllib.ref
...\.......\....\....\hdpdeps.ref
...\.......\....\....\sub00
...\.......\....\....\.....\vhpl00.vho
...\.......\....\....\.....\vhpl01.vho
...\.......\....\....\.....\vhpl02.vho
...\.......\....\....\.....\vhpl03.vho
...\.......\isim.hdlsourcefiles
...\.......\isim.log
...\.......\isim.tmp_save
...\.......\.............\_1
...\.......\pepExtractor.prj
...\.......\xst
...\.......\...\dump.xst
...\.......\...\........\dec24c.prj
...\.......\...\........\..........\ntrc.scr
...\.......\...\work
...\.......\...\....\hdllib.ref
...\.......\...\....\hdpdeps.ref
...\.......\...\....\sub00
...\.......\...\....\.....\vhpl00.vho
...\.......\...\....\.....\vhpl01.vho
...\.......\_xmsgs
...\.......\......\fuse.xmsgs
...\.......\......\vhpcomp.xmsgs
...\.......\......\xst.xmsgs
...\.......\__ISE_repository_24dcase.ise_.lock
...\2to4decoder
...\...........\2to4decoder.ntrc_log
...\...........\2to4decoder.stx
...\...........\2to4decoder.vhd
...\...........\2to4decoder.xst
...\...........\2to4decoder_summary.html
...\...........\2to4decoder_vhdl.prj
...\...........\decoder24.cmd_log
...\...........\decoder24.fdo
...\...........\decoder24.ngc
...\...........\decoder24.ngr
...\...........\decoder24.stx
...\...........\decoder24.syr
...\...........\decoder24.udo
...\...........\decoder24.xst
...\...........\decoder24_summary.html
...\...........\decoder24_tbw.ant
...\...........\decoder24_tbw.fdo
...\...........\decoder24_tbw.jhd
...\...........\decoder24_tbw.tbw
...\...........\decoder24_tbw.udo
...\...........\decoder24_tbw.vhw
...\...........\decoder24_tbw.xwv
...\...........\decoder24_tbw.xwv_bak
...\...........\decoder24_tbw_beh.prj
...\...........\decoder24_tbw_bencher.prj
...\...........\isim
...\...........\....\work
...\...........\....\....\decoder24
...\...........\....\....\.........\behavioral.h
...\...........\....\....\.........\mingw
...\...........\....\....\.........\.....\behavioral.obj
...\...........\....\....\decoder24_tbw
...\...........\....\....\.............\mingw
...\...........\....\....\.............\.....\testbench_arch.obj
...\...........\....\....\.............\testbench_arch.h
...\...........\....\....\.............\xsimtestbench_arch.cpp
...\...........\....\....\hdllib.ref
...\...........\....\....\hdpdeps.ref
...\...........\....\....\sub00
...\...........\....\....\.....\vhpl00.vho