文件名称:counter
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利用EDA工具MAX-PlusII的VDHL输入法，输入VHDL程序，实现2位计数器，在七段译码器上以十进制显示：0、1、2、3、0、...。时钟信号使用83管脚。采用自动机状态转换方式设计该计数器；建立相应仿真波形文件，并进行波形仿真；分析设计电路的正确性。-The use of EDA tools VDHL of the MAX-PlusII input method, enter the VHDL program, the realization of two counters, in the Seven-Segment Decoder by decimal display: 0,1,2,3,0 ,...。 Use 83-pin clock signal. The use of state transition automata approach to the design of the counter the establishment of the corresponding simulation waveform files, and waveform simulation analysis of the correctness of circuit design.
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下载文件列表
counter
.......\cnt2.acf
.......\cnt2.fit
.......\cnt2.hif
.......\cnt2.mmf
.......\cnt2.ndb
.......\cnt2.pin
.......\cnt2.pof
.......\cnt2.rpt
.......\cnt2.snf
.......\CNT2.sym
.......\cnt2.vhd
.......\led7.acf
.......\led7.fit
.......\led7.hif
.......\led7.mmf
.......\led7.ndb
.......\led7.pin
.......\led7.pof
.......\led7.rpt
.......\led7.snf
.......\LED7.sym
.......\led7.vhd
.......\LIB.DLS
.......\top.acf
.......\top.fit
.......\top.gdf
.......\top.hif
.......\top.jam
.......\top.jbc
.......\top.mmf
.......\top.ndb
.......\top.pin
.......\top.pof
.......\top.rpt
.......\top.scf
.......\top.snf
.......\U2958260.DLS
.......\U5879334.DLS
.......\U7284362.DLS
.......\U8027664.DLS
.......\U9251317.DLS
.......\U9484759.DLS
.......\cnt2.acf
.......\cnt2.fit
.......\cnt2.hif
.......\cnt2.mmf
.......\cnt2.ndb
.......\cnt2.pin
.......\cnt2.pof
.......\cnt2.rpt
.......\cnt2.snf
.......\CNT2.sym
.......\cnt2.vhd
.......\led7.acf
.......\led7.fit
.......\led7.hif
.......\led7.mmf
.......\led7.ndb
.......\led7.pin
.......\led7.pof
.......\led7.rpt
.......\led7.snf
.......\LED7.sym
.......\led7.vhd
.......\LIB.DLS
.......\top.acf
.......\top.fit
.......\top.gdf
.......\top.hif
.......\top.jam
.......\top.jbc
.......\top.mmf
.......\top.ndb
.......\top.pin
.......\top.pof
.......\top.rpt
.......\top.scf
.......\top.snf
.......\U2958260.DLS
.......\U5879334.DLS
.......\U7284362.DLS
.......\U8027664.DLS
.......\U9251317.DLS
.......\U9484759.DLS