文件名称:BasedonCPLDFPGAsuchasthefrequencyaccuracyofthedesi
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基于CPLD/FPGA的可编程逻辑器件,借助单片机AT89C51;利用标准频率50~100MHz的周期信号实现系统计数的等精度测量技术。同时采用闸门测量技术完成脉宽,占空比的测量。-Based on CPLD/FPGA programmable logic devices, with single-chip microcomputer AT89C51 using a standard 50 ~ 100MHz frequency of the periodic signal, such as counting the realization of the system measurement accuracy. Measurement techniques used to complete the gate pulse width, duty cycle measurements.
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BasedonCPLD FPGAsuchasthefrequencyaccuracyofthedesign.pdf