文件名称:CC
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quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助-Quartus an example, in the hope that people just learning a little help Quartus
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下载文件列表
CC
..\cmp_state.ini
..\component_builder_logfile.txt
..\db
..\..\PWM.db_info
..\..\PWM.eco.cdb
..\..\PWM.sld_design_entry.sci
..\DeviceSOPC_StandardCore_pwm
..\...........................\cmp_state.ini
..\...........................\component_builder_logfile.txt
..\...........................\cpu_0.ocp
..\...........................\cpu_0.v
..\...........................\cpu_0_jtag_debug_module.v
..\...........................\cpu_0_jtag_debug_module_wrapper.v
..\...........................\cpu_0_ociram_default_contents.mif
..\...........................\cpu_0_test_bench.v
..\...........................\delay_reset_block.bdf
..\...........................\delay_reset_block.bsf
..\...........................\dma.v
..\...........................\epcs_controller.v
..\...........................\epcs_controller_boot_rom.hex
..\...........................\high_res_timer.v
..\...........................\i2c_master.v
..\...........................\i2c_master_bit_ctrl.vhd
..\...........................\i2c_master_byte_ctrl.vhd
..\...........................\i2c_master_top.vhd
..\...........................\ic_tag_ram.mif
..\...........................\jtag_uart.v
..\...........................\key_pio.v
..\...........................\led.v
..\...........................\led_pio.v
..\...........................\oc_i2c_master.vhd
..\...........................\onchip_ram.hex
..\...........................\onchip_ram.v
..\...........................\opencores_i2c_master.v
..\...........................\p0_2_p0_3.v
..\...........................\p0_7_p0_30.v
..\...........................\p1_16_p1_25.v
..\...........................\p2_16_p2_31.v
..\...........................\PLL.bsf
..\...........................\PLL.v
..\...........................\pwm.v
..\...........................\pwm_avalon_interface.v
..\...........................\pwm_register_file.v
..\...........................\pwm_task_logic.v
..\...........................\reset_counter.bsf
..\...........................\reset_counter.v
..\...........................\rf_ram_a.mif
..\...........................\rf_ram_b.mif
..\...........................\SCL.v
..\...........................\SDA.v
..\...........................\sdram.v
..\...........................\sdram_test_component.v
..\...........................\serv_req_info.txt
..\...........................\sopc_builder_debug_log.txt
..\...........................\spi.v
..\...........................\standard.asm.rpt
..\...........................\standard.bdf
..\...........................\standard.cdf
..\...........................\standard.done
..\...........................\standard.fit.eqn
..\...........................\standard.fit.rpt
..\...........................\standard.fit.summary
..\...........................\standard.fld
..\...........................\standard.flow.rpt
..\...........................\standard.jic
..\...........................\standard.map.eqn
..\...........................\standard.map.rpt
..\...........................\standard.map.summary
..\...........................\standard.pin
..\...........................\standard.pof
..\...........................\standard.ppl
..\...........................\standard.qpf
..\...........................\standard.qsf
..\...........................\standard.qsf.bak
..\...........................\standard.qws
..\...........................\standard.rbf
..\...........................\standard.sof
..\...........................\standard.tan.rpt
..\...........................\standard.tan.summary
..\...........................\standard_1c6.bsf
..\...........................\standard_1c6.ptf
..\...........................\standard_1c6.ptf.bak
..\...........................\standard_1c6.v
..\...........................\standard_1c6_generation_script
..\...........................\standard_1c6_log.txt
..\...........................\standard_1c6_setup_quartus.tcl
..\...........................\sysid.v
..\...........................\sys_clock_timer.v
..\...........................\uart.v
..\...........................\uart1.v
..\....................
..\cmp_state.ini
..\component_builder_logfile.txt
..\db
..\..\PWM.db_info
..\..\PWM.eco.cdb
..\..\PWM.sld_design_entry.sci
..\DeviceSOPC_StandardCore_pwm
..\...........................\cmp_state.ini
..\...........................\component_builder_logfile.txt
..\...........................\cpu_0.ocp
..\...........................\cpu_0.v
..\...........................\cpu_0_jtag_debug_module.v
..\...........................\cpu_0_jtag_debug_module_wrapper.v
..\...........................\cpu_0_ociram_default_contents.mif
..\...........................\cpu_0_test_bench.v
..\...........................\delay_reset_block.bdf
..\...........................\delay_reset_block.bsf
..\...........................\dma.v
..\...........................\epcs_controller.v
..\...........................\epcs_controller_boot_rom.hex
..\...........................\high_res_timer.v
..\...........................\i2c_master.v
..\...........................\i2c_master_bit_ctrl.vhd
..\...........................\i2c_master_byte_ctrl.vhd
..\...........................\i2c_master_top.vhd
..\...........................\ic_tag_ram.mif
..\...........................\jtag_uart.v
..\...........................\key_pio.v
..\...........................\led.v
..\...........................\led_pio.v
..\...........................\oc_i2c_master.vhd
..\...........................\onchip_ram.hex
..\...........................\onchip_ram.v
..\...........................\opencores_i2c_master.v
..\...........................\p0_2_p0_3.v
..\...........................\p0_7_p0_30.v
..\...........................\p1_16_p1_25.v
..\...........................\p2_16_p2_31.v
..\...........................\PLL.bsf
..\...........................\PLL.v
..\...........................\pwm.v
..\...........................\pwm_avalon_interface.v
..\...........................\pwm_register_file.v
..\...........................\pwm_task_logic.v
..\...........................\reset_counter.bsf
..\...........................\reset_counter.v
..\...........................\rf_ram_a.mif
..\...........................\rf_ram_b.mif
..\...........................\SCL.v
..\...........................\SDA.v
..\...........................\sdram.v
..\...........................\sdram_test_component.v
..\...........................\serv_req_info.txt
..\...........................\sopc_builder_debug_log.txt
..\...........................\spi.v
..\...........................\standard.asm.rpt
..\...........................\standard.bdf
..\...........................\standard.cdf
..\...........................\standard.done
..\...........................\standard.fit.eqn
..\...........................\standard.fit.rpt
..\...........................\standard.fit.summary
..\...........................\standard.fld
..\...........................\standard.flow.rpt
..\...........................\standard.jic
..\...........................\standard.map.eqn
..\...........................\standard.map.rpt
..\...........................\standard.map.summary
..\...........................\standard.pin
..\...........................\standard.pof
..\...........................\standard.ppl
..\...........................\standard.qpf
..\...........................\standard.qsf
..\...........................\standard.qsf.bak
..\...........................\standard.qws
..\...........................\standard.rbf
..\...........................\standard.sof
..\...........................\standard.tan.rpt
..\...........................\standard.tan.summary
..\...........................\standard_1c6.bsf
..\...........................\standard_1c6.ptf
..\...........................\standard_1c6.ptf.bak
..\...........................\standard_1c6.v
..\...........................\standard_1c6_generation_script
..\...........................\standard_1c6_log.txt
..\...........................\standard_1c6_setup_quartus.tcl
..\...........................\sysid.v
..\...........................\sys_clock_timer.v
..\...........................\uart.v
..\...........................\uart1.v
..\....................