文件名称:DMA
- 所属分类：
- 单片机(51,AVR,MSP430等)
- 资源属性：
- [C/C++] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 496kb
- 下载次数：
- 0次
- 提 供 者：
- kz02****
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
This example provides a descr iption of how to use a DMA channel to transfer a
word data buffer from memory (Flash) to memory (RAM).
The dedicated DMA channel is configured to transfer once a time a 32 word data buffer
stored as constant in the Flash memory to another buffer in the RAM memory.
The received data are stored in the DST_Buffer.
The DMA channel transfer complete interrupt is enabled to generate an interrupt at
the end of the buffer transfer. As soon as the transfer is completed an interrupt is
generated and in the DMA channel interrupt routine the transfer complete interrupt
pending bit is cleared.
The data counter is stored before and after the transfer to show that all data has been
transfered.
TransferStatus gives the data transfer status where it is PASSED if transmitted and
received data are the same otherwise it is FAILED -This example provides a descr iption of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data bufferstored as constant in the Flash memory to another buffer in the RAM memory.The received data are stored in the DST_Buffer.The DMA channel transfer complete interrupt is enabled to generate an interrupt atthe end of the buffer transfer. As soon as the transfer is completed an interrupt isgenerated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has beentransfered.TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
word data buffer from memory (Flash) to memory (RAM).
The dedicated DMA channel is configured to transfer once a time a 32 word data buffer
stored as constant in the Flash memory to another buffer in the RAM memory.
The received data are stored in the DST_Buffer.
The DMA channel transfer complete interrupt is enabled to generate an interrupt at
the end of the buffer transfer. As soon as the transfer is completed an interrupt is
generated and in the DMA channel interrupt routine the transfer complete interrupt
pending bit is cleared.
The data counter is stored before and after the transfer to show that all data has been
transfered.
TransferStatus gives the data transfer status where it is PASSED if transmitted and
received data are the same otherwise it is FAILED -This example provides a descr iption of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data bufferstored as constant in the Flash memory to another buffer in the RAM memory.The received data are stored in the DST_Buffer.The DMA channel transfer complete interrupt is enabled to generate an interrupt atthe end of the buffer transfer. As soon as the transfer is completed an interrupt isgenerated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has beentransfered.TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DMA
...\listing
...\.......\cortexm3_macro.lst
...\.......\DMA.map
...\.......\stm32f10x_vector.lst
...\obj
...\...\cortexm3_macro.o
...\...\DMA.axf
...\...\DMA.htm
...\...\DMA.lnp
...\...\DMA.plg
...\...\DMA.sct
...\...\DMA.tra
...\...\main.crf
...\...\main.d
...\...\main.o
...\...\stm32f10x_dma.crf
...\...\stm32f10x_dma.d
...\...\stm32f10x_dma.o
...\...\stm32f10x_flash.crf
...\...\stm32f10x_flash.d
...\...\stm32f10x_flash.o
...\...\stm32f10x_gpio.crf
...\...\stm32f10x_gpio.d
...\...\stm32f10x_gpio.o
...\...\stm32f10x_it.crf
...\...\stm32f10x_it.d
...\...\stm32f10x_it.o
...\...\stm32f10x_lib.crf
...\...\stm32f10x_lib.d
...\...\stm32f10x_lib.o
...\...\stm32f10x_nvic.crf
...\...\stm32f10x_nvic.d
...\...\stm32f10x_nvic.o
...\...\stm32f10x_rcc.crf
...\...\stm32f10x_rcc.d
...\...\stm32f10x_rcc.o
...\...\stm32f10x_usart.crf
...\...\stm32f10x_usart.d
...\...\stm32f10x_usart.o
...\...\stm32f10x_vector.o
...\...\usart1.crf
...\...\usart1.d
...\...\usart1.o
...\uvsion
...\......\cortexm3_macro.s
...\......\DMA.Opt
...\......\DMA.plg
...\......\DMA.Uv2
...\......\DMA_Target 1.dep
...\......\main.c
...\......\readme.txt
...\......\stm32f10x_conf.h
...\......\stm32f10x_it.c
...\......\stm32f10x_it.h
...\......\stm32f10x_vector.s
...\......\usart1.c
...\listing
...\.......\cortexm3_macro.lst
...\.......\DMA.map
...\.......\stm32f10x_vector.lst
...\obj
...\...\cortexm3_macro.o
...\...\DMA.axf
...\...\DMA.htm
...\...\DMA.lnp
...\...\DMA.plg
...\...\DMA.sct
...\...\DMA.tra
...\...\main.crf
...\...\main.d
...\...\main.o
...\...\stm32f10x_dma.crf
...\...\stm32f10x_dma.d
...\...\stm32f10x_dma.o
...\...\stm32f10x_flash.crf
...\...\stm32f10x_flash.d
...\...\stm32f10x_flash.o
...\...\stm32f10x_gpio.crf
...\...\stm32f10x_gpio.d
...\...\stm32f10x_gpio.o
...\...\stm32f10x_it.crf
...\...\stm32f10x_it.d
...\...\stm32f10x_it.o
...\...\stm32f10x_lib.crf
...\...\stm32f10x_lib.d
...\...\stm32f10x_lib.o
...\...\stm32f10x_nvic.crf
...\...\stm32f10x_nvic.d
...\...\stm32f10x_nvic.o
...\...\stm32f10x_rcc.crf
...\...\stm32f10x_rcc.d
...\...\stm32f10x_rcc.o
...\...\stm32f10x_usart.crf
...\...\stm32f10x_usart.d
...\...\stm32f10x_usart.o
...\...\stm32f10x_vector.o
...\...\usart1.crf
...\...\usart1.d
...\...\usart1.o
...\uvsion
...\......\cortexm3_macro.s
...\......\DMA.Opt
...\......\DMA.plg
...\......\DMA.Uv2
...\......\DMA_Target 1.dep
...\......\main.c
...\......\readme.txt
...\......\stm32f10x_conf.h
...\......\stm32f10x_it.c
...\......\stm32f10x_it.h
...\......\stm32f10x_vector.s
...\......\usart1.c