文件名称:verilog9999
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Verilog 实现9999计数，内有分频模块，计数模块，译码，动态显示扫描等，用数码显示，-Verilog achieve the 9999 count, which took part in the frequency module, counting module, decoding, dynamic display scanning with digital display,
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verilog9999
...........\Block1.bdf
...........\db
...........\..\jishu0.asm.qmsg
...........\..\jishu0.asm_labs.ddb
...........\..\jishu0.cbx.xml
...........\..\jishu0.cmp.cdb
...........\..\jishu0.cmp.hdb
...........\..\jishu0.cmp.kpt
...........\..\jishu0.cmp.logdb
...........\..\jishu0.cmp.rdb
...........\..\jishu0.cmp.tdb
...........\..\jishu0.cmp0.ddb
...........\..\jishu0.dbp
...........\..\jishu0.db_info
...........\..\jishu0.eco.cdb
...........\..\jishu0.eds_overflow
...........\..\jishu0.fit.qmsg
...........\..\jishu0.hier_info
...........\..\jishu0.hif
...........\..\jishu0.map.cdb
...........\..\jishu0.map.hdb
...........\..\jishu0.map.logdb
...........\..\jishu0.map.qmsg
...........\..\jishu0.pre_map.cdb
...........\..\jishu0.pre_map.hdb
...........\..\jishu0.psp
...........\..\jishu0.rtlv.hdb
...........\..\jishu0.rtlv_sg.cdb
...........\..\jishu0.rtlv_sg_swap.cdb
...........\..\jishu0.sgdiff.cdb
...........\..\jishu0.sgdiff.hdb
...........\..\jishu0.signalprobe.cdb
...........\..\jishu0.sim.hdb
...........\..\jishu0.sim.qmsg
...........\..\jishu0.sim.rdb
...........\..\jishu0.sim.vwf
...........\..\jishu0.sld_design_entry.sci
...........\..\jishu0.sld_design_entry_dsc.sci
...........\..\jishu0.syn_hier_info
...........\..\jishu0.tan.qmsg
...........\..\wed.zsf
...........\dis.bsf
...........\dis.v
...........\dispselect.bsf
...........\dispselect.inc
...........\dispselect.v
...........\fegpin.v
...........\fen.bsf
...........\fen1hz.bsf
...........\fen1hz.v
...........\fen1k.bsf
...........\fen1k.v
...........\fengpin.bsf
...........\fengpin1.bsf
...........\ji.bsf
...........\jishu0.asm.rpt
...........\jishu0.bsf
...........\jishu0.cdf
...........\jishu0.done
...........\jishu0.dpf
...........\jishu0.fit.rpt
...........\jishu0.fit.smsg
...........\jishu0.fit.summary
...........\jishu0.flow.rpt
...........\jishu0.map.rpt
...........\jishu0.map.smsg
...........\jishu0.map.summary
...........\jishu0.pin
...........\jishu0.pof
...........\jishu0.qpf
...........\jishu0.qsf
...........\jishu0.qws
...........\jishu0.sim.rpt
...........\jishu0.tan.rpt
...........\jishu0.tan.summary
...........\jishu0.vwf
...........\jishu1.bsf
...........\jishu1.v
...........\mux.bsf
...........\mux.v
...........\yima.bsf
...........\yima.v
...........\Block1.bdf
...........\db
...........\..\jishu0.asm.qmsg
...........\..\jishu0.asm_labs.ddb
...........\..\jishu0.cbx.xml
...........\..\jishu0.cmp.cdb
...........\..\jishu0.cmp.hdb
...........\..\jishu0.cmp.kpt
...........\..\jishu0.cmp.logdb
...........\..\jishu0.cmp.rdb
...........\..\jishu0.cmp.tdb
...........\..\jishu0.cmp0.ddb
...........\..\jishu0.dbp
...........\..\jishu0.db_info
...........\..\jishu0.eco.cdb
...........\..\jishu0.eds_overflow
...........\..\jishu0.fit.qmsg
...........\..\jishu0.hier_info
...........\..\jishu0.hif
...........\..\jishu0.map.cdb
...........\..\jishu0.map.hdb
...........\..\jishu0.map.logdb
...........\..\jishu0.map.qmsg
...........\..\jishu0.pre_map.cdb
...........\..\jishu0.pre_map.hdb
...........\..\jishu0.psp
...........\..\jishu0.rtlv.hdb
...........\..\jishu0.rtlv_sg.cdb
...........\..\jishu0.rtlv_sg_swap.cdb
...........\..\jishu0.sgdiff.cdb
...........\..\jishu0.sgdiff.hdb
...........\..\jishu0.signalprobe.cdb
...........\..\jishu0.sim.hdb
...........\..\jishu0.sim.qmsg
...........\..\jishu0.sim.rdb
...........\..\jishu0.sim.vwf
...........\..\jishu0.sld_design_entry.sci
...........\..\jishu0.sld_design_entry_dsc.sci
...........\..\jishu0.syn_hier_info
...........\..\jishu0.tan.qmsg
...........\..\wed.zsf
...........\dis.bsf
...........\dis.v
...........\dispselect.bsf
...........\dispselect.inc
...........\dispselect.v
...........\fegpin.v
...........\fen.bsf
...........\fen1hz.bsf
...........\fen1hz.v
...........\fen1k.bsf
...........\fen1k.v
...........\fengpin.bsf
...........\fengpin1.bsf
...........\ji.bsf
...........\jishu0.asm.rpt
...........\jishu0.bsf
...........\jishu0.cdf
...........\jishu0.done
...........\jishu0.dpf
...........\jishu0.fit.rpt
...........\jishu0.fit.smsg
...........\jishu0.fit.summary
...........\jishu0.flow.rpt
...........\jishu0.map.rpt
...........\jishu0.map.smsg
...........\jishu0.map.summary
...........\jishu0.pin
...........\jishu0.pof
...........\jishu0.qpf
...........\jishu0.qsf
...........\jishu0.qws
...........\jishu0.sim.rpt
...........\jishu0.tan.rpt
...........\jishu0.tan.summary
...........\jishu0.vwf
...........\jishu1.bsf
...........\jishu1.v
...........\mux.bsf
...........\mux.v
...........\yima.bsf
...........\yima.v