文件名称:shuzizhong
介绍说明－－下载内容均来自于网络，请自行研究使用
是基于EDA系统上的一24小时制的数字钟设计，利用EDA系统通过Quartus2直接运行。-EDA system is based on a 24-hour digital clock design, the use of EDA system, through direct Quartus2 run.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
top1
....\bs.bsf
....\bs.vhd
....\db
....\..\top1.asm.qmsg
....\..\top1.cbx.xml
....\..\top1.cmp.cdb
....\..\top1.cmp.hdb
....\..\top1.cmp.qrpt
....\..\top1.cmp.rdb
....\..\top1.cmp.tdb
....\..\top1.cmp0.ddb
....\..\top1.dbp
....\..\top1.db_info
....\..\top1.eco.cdb
....\..\top1.fit.qmsg
....\..\top1.hier_info
....\..\top1.hif
....\..\top1.map.cdb
....\..\top1.map.hdb
....\..\top1.map.qmsg
....\..\top1.pre_map.cdb
....\..\top1.pre_map.hdb
....\..\top1.psp
....\..\top1.rtlv.hdb
....\..\top1.rtlv_sg.cdb
....\..\top1.rtlv_sg_swap.cdb
....\..\top1.sgdiff.cdb
....\..\top1.sgdiff.hdb
....\..\top1.signalprobe.cdb
....\..\top1.sld_design_entry.sci
....\..\top1.sld_design_entry_dsc.sci
....\..\top1.syn_hier_info
....\..\top1.tan.qmsg
....\display.bsf
....\display.vhd
....\display.vwf
....\top1.asm.rpt
....\top1.bdf
....\top1.cdf
....\top1.done
....\top1.fit.eqn
....\top1.fit.rpt
....\top1.fit.smsg
....\top1.fit.summary
....\top1.flow.rpt
....\top1.map.eqn
....\top1.map.rpt
....\top1.map.summary
....\top1.pin
....\top1.pof
....\top1.qpf
....\top1.qsf
....\top1.qws
....\top1.sof
....\top1.tan.rpt
....\top1.tan.summary
....\top11.bdf
....\top1_assignment_defaults.qdf
....\t_count24.bsf
....\t_count24.vhd
....\t_count24.vwf
....\t_count60.bsf
....\t_count60.vhd
....\t_count60.vwf
....\t_div5.bsf
....\t_div5.vhd
....\t_div5.vwf
....\t_mux2.bsf
....\t_mux2.vhd
....\t_mux2.vwf
....\bs.bsf
....\bs.vhd
....\db
....\..\top1.asm.qmsg
....\..\top1.cbx.xml
....\..\top1.cmp.cdb
....\..\top1.cmp.hdb
....\..\top1.cmp.qrpt
....\..\top1.cmp.rdb
....\..\top1.cmp.tdb
....\..\top1.cmp0.ddb
....\..\top1.dbp
....\..\top1.db_info
....\..\top1.eco.cdb
....\..\top1.fit.qmsg
....\..\top1.hier_info
....\..\top1.hif
....\..\top1.map.cdb
....\..\top1.map.hdb
....\..\top1.map.qmsg
....\..\top1.pre_map.cdb
....\..\top1.pre_map.hdb
....\..\top1.psp
....\..\top1.rtlv.hdb
....\..\top1.rtlv_sg.cdb
....\..\top1.rtlv_sg_swap.cdb
....\..\top1.sgdiff.cdb
....\..\top1.sgdiff.hdb
....\..\top1.signalprobe.cdb
....\..\top1.sld_design_entry.sci
....\..\top1.sld_design_entry_dsc.sci
....\..\top1.syn_hier_info
....\..\top1.tan.qmsg
....\display.bsf
....\display.vhd
....\display.vwf
....\top1.asm.rpt
....\top1.bdf
....\top1.cdf
....\top1.done
....\top1.fit.eqn
....\top1.fit.rpt
....\top1.fit.smsg
....\top1.fit.summary
....\top1.flow.rpt
....\top1.map.eqn
....\top1.map.rpt
....\top1.map.summary
....\top1.pin
....\top1.pof
....\top1.qpf
....\top1.qsf
....\top1.qws
....\top1.sof
....\top1.tan.rpt
....\top1.tan.summary
....\top11.bdf
....\top1_assignment_defaults.qdf
....\t_count24.bsf
....\t_count24.vhd
....\t_count24.vwf
....\t_count60.bsf
....\t_count60.vhd
....\t_count60.vwf
....\t_div5.bsf
....\t_div5.vhd
....\t_div5.vwf
....\t_mux2.bsf
....\t_mux2.vhd
....\t_mux2.vwf