文件名称:timer3
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基于FPGA的VHDL时钟程序
本程序是基于FPGA的时钟程序,可用按键控制较时,有秒闪,调时指示!!! -VHDL-based FPGA-clock procedure This procedure is based on the FPGA clock procedures, key control can be used than when seconds flash, when the instructions stressed!!!
本程序是基于FPGA的时钟程序,可用按键控制较时,有秒闪,调时指示!!! -VHDL-based FPGA-clock procedure This procedure is based on the FPGA clock procedures, key control can be used than when seconds flash, when the instructions stressed!!!
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下载文件列表
时钟.txt