文件名称:jishiqi

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.12mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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用verilog实现的记时器程序,在Quartus II上编译通过并成功运行-Realized by Verilog program in mind when, in the Quartus II compiled and successfully run through
相关搜索: quartus
jishiqi

(系统自动生成,下载前可以参看下载内容)

下载文件列表

jishiqi

.......\aa1

.......\...\db

.......\...\..\prev_cmp_qiangdaqi.asm.qmsg

.......\...\..\prev_cmp_qiangdaqi.fit.qmsg

.......\...\..\prev_cmp_qiangdaqi.map.qmsg

.......\...\..\prev_cmp_qiangdaqi.tan.qmsg

.......\...\..\qiangdaqi.asm.qmsg

.......\...\..\qiangdaqi.cbx.xml

.......\...\..\qiangdaqi.cmp.cdb

.......\...\..\qiangdaqi.cmp.hdb

.......\...\..\qiangdaqi.cmp.logdb

.......\...\..\qiangdaqi.cmp.rdb

.......\...\..\qiangdaqi.cmp.tdb

.......\...\..\qiangdaqi.cmp0.ddb

.......\...\..\qiangdaqi.dbp

.......\...\..\qiangdaqi.db_info

.......\...\..\qiangdaqi.eco.cdb

.......\...\..\qiangdaqi.fit.qmsg

.......\...\..\qiangdaqi.hier_info

.......\...\..\qiangdaqi.hif

.......\...\..\qiangdaqi.map.cdb

.......\...\..\qiangdaqi.map.hdb

.......\...\..\qiangdaqi.map.logdb

.......\...\..\qiangdaqi.map.qmsg

.......\...\..\qiangdaqi.pre_map.cdb

.......\...\..\qiangdaqi.pre_map.hdb

.......\...\..\qiangdaqi.psp

.......\...\..\qiangdaqi.pss

.......\...\..\qiangdaqi.rtlv.hdb

.......\...\..\qiangdaqi.rtlv_sg.cdb

.......\...\..\qiangdaqi.rtlv_sg_swap.cdb

.......\...\..\qiangdaqi.sgdiff.cdb

.......\...\..\qiangdaqi.sgdiff.hdb

.......\...\..\qiangdaqi.signalprobe.cdb

.......\...\..\qiangdaqi.sld_design_entry.sci

.......\...\..\qiangdaqi.sld_design_entry_dsc.sci

.......\...\..\qiangdaqi.syn_hier_info

.......\...\..\qiangdaqi.tan.qmsg

.......\...\..\wed.zsf

.......\...\prev_cmp_qiangdaqi.qmsg

.......\...\qiangdaqi.asm.rpt

.......\...\qiangdaqi.bsf

.......\...\qiangdaqi.cdf

.......\...\qiangdaqi.done

.......\...\qiangdaqi.dpf

.......\...\qiangdaqi.fit.rpt

.......\...\qiangdaqi.fit.smsg

.......\...\qiangdaqi.fit.summary

.......\...\qiangdaqi.flow.rpt

.......\...\qiangdaqi.map.rpt

.......\...\qiangdaqi.map.summary

.......\...\qiangdaqi.pin

.......\...\qiangdaqi.pof

.......\...\qiangdaqi.qpf

.......\...\qiangdaqi.qsf

.......\...\qiangdaqi.qws

.......\...\qiangdaqi.sof

.......\...\qiangdaqi.tan.rpt

.......\...\qiangdaqi.tan.summary

.......\...\qiangdaqi.v

.......\...\qiangdaqi.v.bak

.......\...\qiangdaqi_assignment_defaults.qdf

.......\...\sopc_builder_log.txt

.......\CLK_1HZ.asm.rpt

.......\CLK_1HZ.bsf

.......\CLK_1HZ.done

.......\CLK_1HZ.fit.rpt

.......\CLK_1HZ.fit.smsg

.......\CLK_1HZ.fit.summary

.......\CLK_1HZ.flow.rpt

.......\CLK_1HZ.map.rpt

.......\CLK_1HZ.map.summary

.......\CLK_1HZ.pin

.......\CLK_1HZ.pof

.......\CLK_1HZ.qpf

.......\CLK_1HZ.qsf

.......\CLK_1HZ.qws

.......\CLK_1HZ.sof

.......\CLK_1HZ.tan.rpt

.......\CLK_1HZ.tan.summary

.......\CLK_1HZ.v

.......\CNT24.asm.rpt

.......\CNT24.bsf

.......\CNT24.done

.......\CNT24.fit.rpt

.......\CNT24.fit.smsg

.......\CNT24.fit.summary

.......\CNT24.flow.rpt

.......\CNT24.map.rpt

.......\CNT24.map.summary

.......\CNT24.pin

.......\CNT24.pof

.......\CNT24.qpf

.......\CNT24.qsf

.......\CNT24.qws

.......\CNT24.sof

.......\CNT24.tan.rpt

.......\CNT24.tan.summary

.......\CNT24.v

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