文件名称:vspi_VHDL
介绍说明--下载内容均来自于网络,请自行研究使用
FPGA/CPLD VHDL语言实现SPI,拥有两种模式,FPGA/CPLD即可工作在主机模式,又可工作在从机模式 -FPGA/CPLD VHDL language SPI, have the two models, FPGA/CPLD can work in host mode, but also work in slave mode
(系统自动生成,下载前可以参看下载内容)
下载文件列表
vspi
....\db
....\..\add_sub_rah.tdf
....\..\vspi.asm.qmsg
....\..\vspi.cbx.xml
....\..\vspi.cmp.cdb
....\..\vspi.cmp.hdb
....\..\vspi.cmp.logdb
....\..\vspi.cmp.rdb
....\..\vspi.cmp.tdb
....\..\vspi.cmp0.ddb
....\..\vspi.dbp
....\..\vspi.db_info
....\..\vspi.eco.cdb
....\..\vspi.eds_overflow
....\..\vspi.fit.qmsg
....\..\vspi.hier_info
....\..\vspi.hif
....\..\vspi.map.cdb
....\..\vspi.map.hdb
....\..\vspi.map.logdb
....\..\vspi.map.qmsg
....\..\vspi.pre_map.cdb
....\..\vspi.pre_map.hdb
....\..\vspi.psp
....\..\vspi.rtlv.hdb
....\..\vspi.rtlv_sg.cdb
....\..\vspi.rtlv_sg_swap.cdb
....\..\vspi.sgdiff.cdb
....\..\vspi.sgdiff.hdb
....\..\vspi.sim.hdb
....\..\vspi.sim.qmsg
....\..\vspi.sim.rdb
....\..\vspi.sim.vwf
....\..\vspi.sld_design_entry.sci
....\..\vspi.sld_design_entry_dsc.sci
....\..\vspi.syn_hier_info
....\..\vspi.tan.qmsg
....\..\wed.zsf
....\test1.vwf
....\vspi.asm.rpt
....\vspi.done
....\vspi.fit.rpt
....\vspi.fit.summary
....\vspi.flow.rpt
....\vspi.map.rpt
....\vspi.map.summary
....\vspi.pin
....\vspi.pof
....\vspi.qpf
....\vspi.qsf
....\vspi.qws
....\vspi.sim.rpt
....\vspi.sof
....\vspi.tan.rpt
....\vspi.tan.summary
....\vspi.vhd
....\db
....\..\add_sub_rah.tdf
....\..\vspi.asm.qmsg
....\..\vspi.cbx.xml
....\..\vspi.cmp.cdb
....\..\vspi.cmp.hdb
....\..\vspi.cmp.logdb
....\..\vspi.cmp.rdb
....\..\vspi.cmp.tdb
....\..\vspi.cmp0.ddb
....\..\vspi.dbp
....\..\vspi.db_info
....\..\vspi.eco.cdb
....\..\vspi.eds_overflow
....\..\vspi.fit.qmsg
....\..\vspi.hier_info
....\..\vspi.hif
....\..\vspi.map.cdb
....\..\vspi.map.hdb
....\..\vspi.map.logdb
....\..\vspi.map.qmsg
....\..\vspi.pre_map.cdb
....\..\vspi.pre_map.hdb
....\..\vspi.psp
....\..\vspi.rtlv.hdb
....\..\vspi.rtlv_sg.cdb
....\..\vspi.rtlv_sg_swap.cdb
....\..\vspi.sgdiff.cdb
....\..\vspi.sgdiff.hdb
....\..\vspi.sim.hdb
....\..\vspi.sim.qmsg
....\..\vspi.sim.rdb
....\..\vspi.sim.vwf
....\..\vspi.sld_design_entry.sci
....\..\vspi.sld_design_entry_dsc.sci
....\..\vspi.syn_hier_info
....\..\vspi.tan.qmsg
....\..\wed.zsf
....\test1.vwf
....\vspi.asm.rpt
....\vspi.done
....\vspi.fit.rpt
....\vspi.fit.summary
....\vspi.flow.rpt
....\vspi.map.rpt
....\vspi.map.summary
....\vspi.pin
....\vspi.pof
....\vspi.qpf
....\vspi.qsf
....\vspi.qws
....\vspi.sim.rpt
....\vspi.sof
....\vspi.tan.rpt
....\vspi.tan.summary
....\vspi.vhd