文件名称:SPI_Code(Verilog)
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SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用-SPI bus under the Verilog hardware descr iption language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses
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下载文件列表
spi_slave_model.v
tb_spi_top.v
wb_master_model.v
tb_spi_top.v
wb_master_model.v