文件名称:counter
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基于CPLD的计数器 实现光纤测距,包含与单片机的时序控制 Verilog 实现 通过仿真-CPLD-based counters realize optical ranging, single-chip microcomputer that contains timing control and realize the adoption of Verilog simulation
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下载文件列表
counter
.......\counter.qpf
.......\counter.qsf
.......\counter.qws
.......\db
.......\..\counter.db_info
.......\..\counter.eco.cdb
.......\..\counter.sld_design_entry.sci
.......\counter.qpf
.......\counter.qsf
.......\counter.qws
.......\db
.......\..\counter.db_info
.......\..\counter.eco.cdb
.......\..\counter.sld_design_entry.sci