文件名称:programe
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关于verilog的各个基本模块的源代码，如加法器，寄存器，选择器及各个测试文件-With regard to the various basic modules Verilog source code, such as adders, registers, selectors and the various test file
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下载文件列表
程序
....\add.v
....\addtest.v
....\alladd.v
....\alladdtest.v
....\ALU.v
....\ALUtest.v
....\control.v
....\controltest.v
....\datapath.v
....\decoder.v
....\decodertest.v
....\dff.v
....\dfftest.v
....\ir.v
....\irtest.v
....\memory.v
....\memorytest.v
....\mux21_32.v
....\mux21_32test.v
....\mux21_5.v
....\mux21_5test.v
....\mux41_32.v
....\mux41_32test.v
....\mux_32.v
....\mux_32test.v
....\pc.v
....\pctest.v
....\register.v
....\registerfile.v
....\registerfiletest.v
....\registertest.v
....\TOP.v
....\TOP_test.v
....\transcript
....\zerostore.v
....\add.v
....\addtest.v
....\alladd.v
....\alladdtest.v
....\ALU.v
....\ALUtest.v
....\control.v
....\controltest.v
....\datapath.v
....\decoder.v
....\decodertest.v
....\dff.v
....\dfftest.v
....\ir.v
....\irtest.v
....\memory.v
....\memorytest.v
....\mux21_32.v
....\mux21_32test.v
....\mux21_5.v
....\mux21_5test.v
....\mux41_32.v
....\mux41_32test.v
....\mux_32.v
....\mux_32test.v
....\pc.v
....\pctest.v
....\register.v
....\registerfile.v
....\registerfiletest.v
....\registertest.v
....\TOP.v
....\TOP_test.v
....\transcript
....\zerostore.v