文件名称:BasedonVHDLdesigndigitalfrequencyof
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本文用VHDL在CPLD器件上实现一种8 b数字频率计测频系统,能够用十进制数码显示被测信号的频率,不仅能够测量正弦波、方波和三角波等信号的频率,而且还能对其他多种物理量进行测量。具有体积小、可靠性高、功耗低的特点。-In this paper, VHDL in the CPLD device to achieve a 8 b digital frequency meter measuring frequency system that used the decimal digital display of measured signals in the frequency, not only to measure sine wave, square wave and triangular wave signals such as frequency, but also to other a variety of physical measurements. Small size, high reliability, low power consumption characteristics.
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基于VHDL语言设计数字频率计.doc