文件名称:SIIGX_PCIe_Kit

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 40.66mb
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  • 0次
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  • 林*
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基于SIIGX的PCIe的Kit,包含硬件原理图,pcb图,驱动,和示例代码-SIIGX based on the PCIe-Kit, includes hardware schematics, pcb map, drive, and sample code
(系统自动生成,下载前可以参看下载内容)

下载文件列表

SIIGX_PCIe_Kit

..............\BoardDesignFiles

..............\................\Assembly

..............\................\........\SIIGX_PCIe_BOM_RevC.xls

..............\................\........\siigx_pcie_c_assy_sht1.pdf

..............\................\........\siigx_pcie_c_assy_sht2.pdf

..............\................\Layout

..............\................\......\signoise.run

..............\................\......\............\case1

..............\................\......\siigx_pcie_c.brd

..............\................\......\siigx_pcie_c_fab_sht1.pdf

..............\................\......\siigx_pcie_c_stackup.pdf

..............\................\Schematic

..............\................\.........\allegro

..............\................\.........\.......\pstchip.dat

..............\................\.........\.......\pstxnet.dat

..............\................\.........\.......\pstxprt.dat

..............\................\.........\S2GXPCIE.DSN

..............\................\.........\s2gxpcie.opj

..............\................\.........\s2gxpcie.pdf

..............\Docs

..............\....\L01-43006-00_SIIGX_PCIe_DCL.pdf

..............\....\P25-36002-01_SIIGX_PCIe_UserGuide.pdf

..............\....\SIIGX_PCIe_ReferenceManual_08Aug06.pdf

..............\Drivers

..............\.......\altera.inf

..............\.......\install.bat

..............\.......\pcie.exe

..............\.......\unins.bat

..............\.......\wdlib.dll

..............\.......\wdreg.exe

..............\.......\wd_utils.dll

..............\.......\windrvr6.inf

..............\.......\windrvr6.sys

..............\Examples

..............\........\ManufacturingTestDesigns

..............\........\........................\ddr2_v340_ecc.qar

..............\........\........................\ddr2_v340_ecc_restored

..............\........\........................\......................\add_constraints_for_ddr2_topecc.tcl

..............\........\........................\......................\altera

..............\........\........................\......................\......\MegaCore

..............\........\........................\......................\......\........\ddr_ddr2_sdram-v3.4.0

..............\........\........................\......................\......\........\.....................\lib

..............\........\........................\......................\......\........\.....................\...\auk_ddr2_init.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_avalon_if.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_bank_details.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_controller.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_functions.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_input_buf.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_tb_functions.vhd

..............\........\........................\......................\......\........\.....................\...\auk_ddr_timers.vhd

..............\........\........................\......................\......\........\.....................\...\example_lfsr8.v

..............\........\........................\......................\assignment_defaults.qdf

..............\........\........................\......................\auto_add_ddr_constraints.tcl

..............\........\........................\......................\auto_verify_ddr_timing.tcl

..............\........\........................\......................\constraints_out.txt

..............\........\........................\......................\db

..............\........\........................\......................\..\altsyncram_a6e1.tdf

..............\........

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