文件名称:dianzishizhong
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题目:电子时钟的设计
一、实验目的:
1. 掌握多位计数器相连的设计方法。
2. 掌握十进制、六十进制、二十四进制计数器的设计方法。
3. 继续巩固多位数码管的驱动及编码。
4. 掌握扬声器的驱动
5. 掌握EPLD技术的层次化设计方法
二、实验要求:
1.用时、分、秒计数显示功能,以24小时循环计时。
2.具用清零,调节小时、分钟功能。
3.具用整点报时功能。
-Title: E-clock design, experimental purposes: 1. To master a number of counters connected to the design method. 2. Grasp the metric system, six decimal, hexadecimal 24 counter design. 3. Continue to consolidate a number of digital tube drivers and coding. 4. Grasp the speaker driver 5. EPLD technology to master-level design method II, the experimental requirements: 1. With hours, minutes and seconds count display to a 24-hour cycle time. 2. With a zero, adjust hours, minutes functions. 3. The whole point of using a time function.
一、实验目的:
1. 掌握多位计数器相连的设计方法。
2. 掌握十进制、六十进制、二十四进制计数器的设计方法。
3. 继续巩固多位数码管的驱动及编码。
4. 掌握扬声器的驱动
5. 掌握EPLD技术的层次化设计方法
二、实验要求:
1.用时、分、秒计数显示功能,以24小时循环计时。
2.具用清零,调节小时、分钟功能。
3.具用整点报时功能。
-Title: E-clock design, experimental purposes: 1. To master a number of counters connected to the design method. 2. Grasp the metric system, six decimal, hexadecimal 24 counter design. 3. Continue to consolidate a number of digital tube drivers and coding. 4. Grasp the speaker driver 5. EPLD technology to master-level design method II, the experimental requirements: 1. With hours, minutes and seconds count display to a 24-hour cycle time. 2. With a zero, adjust hours, minutes functions. 3. The whole point of using a time function.
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