文件名称:crc16_ccitt
介绍说明－－下载内容均来自于网络，请自行研究使用
crc_table.c is for reset seed( 0000 )
crc_table_1.c is for reset seed( ffff)
CRC16_D8_m.v is a verilog module of byte paralle crc.
CRC16_D8_m_tb.v is the testbench file of above module. -crc_table.c is for reset seed (0000) crc_table_1.c is for reset seed (ffff) CRC16_D8_m.v is a verilog module of byte paralle crc.CRC16_D8_m_tb.v is the testbench file of above module.
crc_table_1.c is for reset seed( ffff)
CRC16_D8_m.v is a verilog module of byte paralle crc.
CRC16_D8_m_tb.v is the testbench file of above module. -crc_table.c is for reset seed (0000) crc_table_1.c is for reset seed (ffff) CRC16_D8_m.v is a verilog module of byte paralle crc.CRC16_D8_m_tb.v is the testbench file of above module.
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(系统自动生成,下载前可以参看下载内容)
下载文件列表
crc16_ccitt
...........\CRC16_D8_m.v
...........\CRC16_D8_m_tb.v
...........\crc_table.c
...........\crc_table_1.c
...........\CRC16_D8_m.v
...........\CRC16_D8_m_tb.v
...........\crc_table.c
...........\crc_table_1.c