文件名称:cisc8bitCPU
介绍说明--下载内容均来自于网络,请自行研究使用
一个用硬件描述语言编写的cisc类型8位总线长度cpu实例的源代码-A hardware descr iption language using the CISC type 8-bit bus the length of the source code examples cpu
(系统自动生成,下载前可以参看下载内容)
下载文件列表
cisc8bit
........\.untf
........\04年课程设计指导书8位机.doc
........\ALU.bld
........\ALU.cmd_log
........\ALU.ngc
........\ALU.ngr
........\ALU.prj
........\ALU.spl
........\ALU.sprj
........\ALU.stx
........\alu.sym
........\ALU.syr
........\ALU.v
........\automake.log
........\bitgen.ut
........\buffer.spl
........\buffer.sym
........\buffer.v
........\clkgen'.v
........\clkgen.bgn
........\clkgen.bit
........\clkgen.bld
........\clkgen.cmd_log
........\clkgen.drc
........\clkgen.ldo
........\clkgen.lso
........\clkgen.mrp
........\clkgen.nc1
........\clkgen.ncd
........\clkgen.ngc
........\clkgen.ngd
........\clkgen.ngm
........\clkgen.ngr
........\clkgen.pad
........\clkgen.pad_txt
........\clkgen.par
........\clkgen.pcf
........\clkgen.placed_ncd_tracker
........\clkgen.prj
........\clkgen.routed_ncd_tracker
........\clkgen.stx
........\clkgen.syr
........\clkgen.twr
........\clkgen.twx
........\clkgen.ut
........\clkgen.v
........\clkgen.xpi
........\clkgen_last_par.ncd
........\clkgen_map.ncd
........\clkgen_map.ngm
........\clkgen_new.bgn
........\clkgen_new.bit
........\clkgen_new.bld
........\clkgen_new.cmd_log
........\clkgen_new.dly
........\clkgen_new.drc
........\clkgen_new.mrp
........\clkgen_new.nc1
........\clkgen_new.ncd
........\clkgen_new.ngc
........\clkgen_new.ngd
........\clkgen_new.ngm
........\clkgen_new.ngr
........\clkgen_new.pad
........\clkgen_new.par
........\clkgen_new.pcf
........\clkgen_new.prj
........\clkgen_new.sprj
........\clkgen_new.stx
........\clkgen_new.syr
........\clkgen_new.twr
........\clkgen_new.twx
........\clkgen_new.ut
........\clkgen_new.v
........\clkgen_new.xpi
........\clkgen_new_map.ncd
........\clkgen_new_map.ngm
........\clkgen_new_ngdbuild.nav
........\clkgen_pad.csv
........\clkgen_pad.txt
........\clkgen_test.v
........\clkgen_vhdl.prj
........\cm.mic
........\cm.v
........\CMprogram
........\coregen.log
........\coregen.prj
........\cpu.bgn
........\cpu.bit
........\cpu.bld
........\cpu.cmd_log
........\cpu.dhp
........\cpu.dly
........\cpu.drc
........\cpu.ldo
........\cpu.lso
........\cpu.mrp
........\cpu.nc1
........\cpu.ncd
........\.untf
........\04年课程设计指导书8位机.doc
........\ALU.bld
........\ALU.cmd_log
........\ALU.ngc
........\ALU.ngr
........\ALU.prj
........\ALU.spl
........\ALU.sprj
........\ALU.stx
........\alu.sym
........\ALU.syr
........\ALU.v
........\automake.log
........\bitgen.ut
........\buffer.spl
........\buffer.sym
........\buffer.v
........\clkgen'.v
........\clkgen.bgn
........\clkgen.bit
........\clkgen.bld
........\clkgen.cmd_log
........\clkgen.drc
........\clkgen.ldo
........\clkgen.lso
........\clkgen.mrp
........\clkgen.nc1
........\clkgen.ncd
........\clkgen.ngc
........\clkgen.ngd
........\clkgen.ngm
........\clkgen.ngr
........\clkgen.pad
........\clkgen.pad_txt
........\clkgen.par
........\clkgen.pcf
........\clkgen.placed_ncd_tracker
........\clkgen.prj
........\clkgen.routed_ncd_tracker
........\clkgen.stx
........\clkgen.syr
........\clkgen.twr
........\clkgen.twx
........\clkgen.ut
........\clkgen.v
........\clkgen.xpi
........\clkgen_last_par.ncd
........\clkgen_map.ncd
........\clkgen_map.ngm
........\clkgen_new.bgn
........\clkgen_new.bit
........\clkgen_new.bld
........\clkgen_new.cmd_log
........\clkgen_new.dly
........\clkgen_new.drc
........\clkgen_new.mrp
........\clkgen_new.nc1
........\clkgen_new.ncd
........\clkgen_new.ngc
........\clkgen_new.ngd
........\clkgen_new.ngm
........\clkgen_new.ngr
........\clkgen_new.pad
........\clkgen_new.par
........\clkgen_new.pcf
........\clkgen_new.prj
........\clkgen_new.sprj
........\clkgen_new.stx
........\clkgen_new.syr
........\clkgen_new.twr
........\clkgen_new.twx
........\clkgen_new.ut
........\clkgen_new.v
........\clkgen_new.xpi
........\clkgen_new_map.ncd
........\clkgen_new_map.ngm
........\clkgen_new_ngdbuild.nav
........\clkgen_pad.csv
........\clkgen_pad.txt
........\clkgen_test.v
........\clkgen_vhdl.prj
........\cm.mic
........\cm.v
........\CMprogram
........\coregen.log
........\coregen.prj
........\cpu.bgn
........\cpu.bit
........\cpu.bld
........\cpu.cmd_log
........\cpu.dhp
........\cpu.dly
........\cpu.drc
........\cpu.ldo
........\cpu.lso
........\cpu.mrp
........\cpu.nc1
........\cpu.ncd