文件名称:lab80
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基于FPGA的CPU设计 VHDL 编写-FPGA-CPU design based on VHDL prepared
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下载文件列表
lab80
.....\part1
.....\.....\db
.....\.....\..\altsyncram_c6a1.tdf
.....\.....\..\altsyncram_s8h1.tdf
.....\.....\..\part1.asm.qmsg
.....\.....\..\part1.cbx.xml
.....\.....\..\part1.cmp.cdb
.....\.....\..\part1.cmp.hdb
.....\.....\..\part1.cmp.kpt
.....\.....\..\part1.cmp.logdb
.....\.....\..\part1.cmp.rdb
.....\.....\..\part1.cmp0.ddb
.....\.....\..\part1.dbp
.....\.....\..\part1.db_info
.....\.....\..\part1.eco.cdb
.....\.....\..\part1.eds_overflow
.....\.....\..\part1.fit.qmsg
.....\.....\..\part1.hier_info
.....\.....\..\part1.hif
.....\.....\..\part1.map.cdb
.....\.....\..\part1.map.hdb
.....\.....\..\part1.map.logdb
.....\.....\..\part1.map.qmsg
.....\.....\..\part1.pre_map.cdb
.....\.....\..\part1.pre_map.hdb
.....\.....\..\part1.psp
.....\.....\..\part1.rtlv.hdb
.....\.....\..\part1.rtlv_sg.cdb
.....\.....\..\part1.rtlv_sg_swap.cdb
.....\.....\..\part1.sgdiff.cdb
.....\.....\..\part1.sgdiff.hdb
.....\.....\..\part1.signalprobe.cdb
.....\.....\..\part1.sim.hdb
.....\.....\..\part1.sim.qmsg
.....\.....\..\part1.sim.rdb
.....\.....\..\part1.sim.vwf
.....\.....\..\part1.sld_design_entry.sci
.....\.....\..\part1.sld_design_entry_dsc.sci
.....\.....\..\part1.syn_hier_info
.....\.....\..\part1.tan.qmsg
.....\.....\..\wed.zsf
.....\.....\part1.asm.rpt
.....\.....\part1.cdf
.....\.....\part1.done
.....\.....\part1.fit.eqn
.....\.....\part1.fit.rpt
.....\.....\part1.fit.smsg
.....\.....\part1.fit.summary
.....\.....\part1.flow.rpt
.....\.....\part1.map.eqn
.....\.....\part1.map.rpt
.....\.....\part1.map.summary
.....\.....\part1.pin
.....\.....\part1.pof
.....\.....\part1.qpf
.....\.....\part1.qsf
.....\.....\part1.qws
.....\.....\part1.sim.rpt
.....\.....\part1.sof
.....\.....\part1.tan.rpt
.....\.....\part1.tan.summary
.....\.....\part1.v
.....\.....\part1.vwf
.....\.....\part1_assignment_defaults.qdf
.....\.....\ramlpm.bsf
.....\.....\ramlpm.v
.....\.....\ramlpm_waveforms.html
.....\part2
.....\.....\db
.....\.....\..\altsyncram_c6a1.tdf
.....\.....\..\altsyncram_s8h1.tdf
.....\.....\..\part2.asm.qmsg
.....\.....\..\part2.asm_labs.ddb
.....\.....\..\part2.cbx.xml
.....\.....\..\part2.cmp.cdb
.....\.....\..\part2.cmp.hdb
.....\.....\..\part2.cmp.kpt
.....\.....\..\part2.cmp.logdb
.....\.....\..\part2.cmp.rdb
.....\.....\..\part2.cmp.tdb
.....\.....\..\part2.cmp0.ddb
.....\.....\..\part2.dbp
.....\.....\..\part2.db_info
.....\.....\..\part2.eco.cdb
.....\.....\..\part2.fit.qmsg
.....\.....\..\part2.hier_info
.....\.....\..\part2.hif
.....\.....\..\part2.map.cdb
.....\.....\..\part2.map.hdb
.....\.....\..\part2.map.logdb
.....\.....\..\part2.map.qmsg
.....\.....\..\part2.pre_map.cdb
.....\.....\..\part2.pre_map.hdb
.....\.....\..\part2.psp
.....\.....\..\part2.rtlv.hdb
.....\.....\..\part2.rtlv_sg.cdb
.....\.....\..\part2.rtlv_sg_swap.cdb
.....\part1
.....\.....\db
.....\.....\..\altsyncram_c6a1.tdf
.....\.....\..\altsyncram_s8h1.tdf
.....\.....\..\part1.asm.qmsg
.....\.....\..\part1.cbx.xml
.....\.....\..\part1.cmp.cdb
.....\.....\..\part1.cmp.hdb
.....\.....\..\part1.cmp.kpt
.....\.....\..\part1.cmp.logdb
.....\.....\..\part1.cmp.rdb
.....\.....\..\part1.cmp0.ddb
.....\.....\..\part1.dbp
.....\.....\..\part1.db_info
.....\.....\..\part1.eco.cdb
.....\.....\..\part1.eds_overflow
.....\.....\..\part1.fit.qmsg
.....\.....\..\part1.hier_info
.....\.....\..\part1.hif
.....\.....\..\part1.map.cdb
.....\.....\..\part1.map.hdb
.....\.....\..\part1.map.logdb
.....\.....\..\part1.map.qmsg
.....\.....\..\part1.pre_map.cdb
.....\.....\..\part1.pre_map.hdb
.....\.....\..\part1.psp
.....\.....\..\part1.rtlv.hdb
.....\.....\..\part1.rtlv_sg.cdb
.....\.....\..\part1.rtlv_sg_swap.cdb
.....\.....\..\part1.sgdiff.cdb
.....\.....\..\part1.sgdiff.hdb
.....\.....\..\part1.signalprobe.cdb
.....\.....\..\part1.sim.hdb
.....\.....\..\part1.sim.qmsg
.....\.....\..\part1.sim.rdb
.....\.....\..\part1.sim.vwf
.....\.....\..\part1.sld_design_entry.sci
.....\.....\..\part1.sld_design_entry_dsc.sci
.....\.....\..\part1.syn_hier_info
.....\.....\..\part1.tan.qmsg
.....\.....\..\wed.zsf
.....\.....\part1.asm.rpt
.....\.....\part1.cdf
.....\.....\part1.done
.....\.....\part1.fit.eqn
.....\.....\part1.fit.rpt
.....\.....\part1.fit.smsg
.....\.....\part1.fit.summary
.....\.....\part1.flow.rpt
.....\.....\part1.map.eqn
.....\.....\part1.map.rpt
.....\.....\part1.map.summary
.....\.....\part1.pin
.....\.....\part1.pof
.....\.....\part1.qpf
.....\.....\part1.qsf
.....\.....\part1.qws
.....\.....\part1.sim.rpt
.....\.....\part1.sof
.....\.....\part1.tan.rpt
.....\.....\part1.tan.summary
.....\.....\part1.v
.....\.....\part1.vwf
.....\.....\part1_assignment_defaults.qdf
.....\.....\ramlpm.bsf
.....\.....\ramlpm.v
.....\.....\ramlpm_waveforms.html
.....\part2
.....\.....\db
.....\.....\..\altsyncram_c6a1.tdf
.....\.....\..\altsyncram_s8h1.tdf
.....\.....\..\part2.asm.qmsg
.....\.....\..\part2.asm_labs.ddb
.....\.....\..\part2.cbx.xml
.....\.....\..\part2.cmp.cdb
.....\.....\..\part2.cmp.hdb
.....\.....\..\part2.cmp.kpt
.....\.....\..\part2.cmp.logdb
.....\.....\..\part2.cmp.rdb
.....\.....\..\part2.cmp.tdb
.....\.....\..\part2.cmp0.ddb
.....\.....\..\part2.dbp
.....\.....\..\part2.db_info
.....\.....\..\part2.eco.cdb
.....\.....\..\part2.fit.qmsg
.....\.....\..\part2.hier_info
.....\.....\..\part2.hif
.....\.....\..\part2.map.cdb
.....\.....\..\part2.map.hdb
.....\.....\..\part2.map.logdb
.....\.....\..\part2.map.qmsg
.....\.....\..\part2.pre_map.cdb
.....\.....\..\part2.pre_map.hdb
.....\.....\..\part2.psp
.....\.....\..\part2.rtlv.hdb
.....\.....\..\part2.rtlv_sg.cdb
.....\.....\..\part2.rtlv_sg_swap.cdb