文件名称:eecadd_8
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此程序用VHDL语言编写,在四位加法器基础上完成8位二进制加法,输出是BCD码-This procedure using VHDL language, in the four adder based on the completion of eight binary adder, the output is BCD code
相关搜索: bcd
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下载文件列表
eecadd_8
........\db
........\..\eecadd_8.asm.qmsg
........\..\eecadd_8.cbx.xml
........\..\eecadd_8.cmp.cdb
........\..\eecadd_8.cmp.hdb
........\..\eecadd_8.cmp.qrpt
........\..\eecadd_8.cmp.rdb
........\..\eecadd_8.cmp.tdb
........\..\eecadd_8.cmp0.ddb
........\..\eecadd_8.dbp
........\..\eecadd_8.db_info
........\..\eecadd_8.eco.cdb
........\..\eecadd_8.fit.qmsg
........\..\eecadd_8.hier_info
........\..\eecadd_8.hif
........\..\eecadd_8.map.cdb
........\..\eecadd_8.map.hdb
........\..\eecadd_8.map.qmsg
........\..\eecadd_8.pre_map.cdb
........\..\eecadd_8.pre_map.hdb
........\..\eecadd_8.psp
........\..\eecadd_8.rtlv.hdb
........\..\eecadd_8.rtlv_sg.cdb
........\..\eecadd_8.rtlv_sg_swap.cdb
........\..\eecadd_8.sgdiff.cdb
........\..\eecadd_8.sgdiff.hdb
........\..\eecadd_8.signalprobe.cdb
........\..\eecadd_8.sim.hdb
........\..\eecadd_8.sim.qmsg
........\..\eecadd_8.sim.qrpt
........\..\eecadd_8.sim.rdb
........\..\eecadd_8.sim.vwf
........\..\eecadd_8.sld_design_entry.sci
........\..\eecadd_8.sld_design_entry_dsc.sci
........\..\eecadd_8.syn_hier_info
........\..\eecadd_8.tan.qmsg
........\eecadd_8.acf
........\eecadd_8.asm.rpt
........\eecadd_8.done
........\eecadd_8.fit
........\eecadd_8.fit.eqn
........\eecadd_8.fit.rpt
........\eecadd_8.fit.summary
........\eecadd_8.flow.rpt
........\eecadd_8.hex
........\eecadd_8.hif
........\eecadd_8.map.eqn
........\eecadd_8.map.rpt
........\eecadd_8.map.summary
........\eecadd_8.mmf
........\eecadd_8.ndb
........\eecadd_8.pin
........\eecadd_8.pof
........\eecadd_8.qpf
........\eecadd_8.qsf
........\eecadd_8.qws
........\eecadd_8.rpt
........\eecadd_8.scf
........\eecadd_8.sim.rpt
........\eecadd_8.snf
........\eecadd_8.sof
........\EECADD_8.sym
........\eecadd_8.tan.rpt
........\eecadd_8.tan.summary
........\eecadd_8.ttf
........\eecadd_8.vhd
........\eecadd_8.vwf
........\eecadd_8_1.pof
........\LIB.DLS
........\U2825336.DLS
........\U4328350.DLS
........\U9992235.DLS
........\db
........\..\eecadd_8.asm.qmsg
........\..\eecadd_8.cbx.xml
........\..\eecadd_8.cmp.cdb
........\..\eecadd_8.cmp.hdb
........\..\eecadd_8.cmp.qrpt
........\..\eecadd_8.cmp.rdb
........\..\eecadd_8.cmp.tdb
........\..\eecadd_8.cmp0.ddb
........\..\eecadd_8.dbp
........\..\eecadd_8.db_info
........\..\eecadd_8.eco.cdb
........\..\eecadd_8.fit.qmsg
........\..\eecadd_8.hier_info
........\..\eecadd_8.hif
........\..\eecadd_8.map.cdb
........\..\eecadd_8.map.hdb
........\..\eecadd_8.map.qmsg
........\..\eecadd_8.pre_map.cdb
........\..\eecadd_8.pre_map.hdb
........\..\eecadd_8.psp
........\..\eecadd_8.rtlv.hdb
........\..\eecadd_8.rtlv_sg.cdb
........\..\eecadd_8.rtlv_sg_swap.cdb
........\..\eecadd_8.sgdiff.cdb
........\..\eecadd_8.sgdiff.hdb
........\..\eecadd_8.signalprobe.cdb
........\..\eecadd_8.sim.hdb
........\..\eecadd_8.sim.qmsg
........\..\eecadd_8.sim.qrpt
........\..\eecadd_8.sim.rdb
........\..\eecadd_8.sim.vwf
........\..\eecadd_8.sld_design_entry.sci
........\..\eecadd_8.sld_design_entry_dsc.sci
........\..\eecadd_8.syn_hier_info
........\..\eecadd_8.tan.qmsg
........\eecadd_8.acf
........\eecadd_8.asm.rpt
........\eecadd_8.done
........\eecadd_8.fit
........\eecadd_8.fit.eqn
........\eecadd_8.fit.rpt
........\eecadd_8.fit.summary
........\eecadd_8.flow.rpt
........\eecadd_8.hex
........\eecadd_8.hif
........\eecadd_8.map.eqn
........\eecadd_8.map.rpt
........\eecadd_8.map.summary
........\eecadd_8.mmf
........\eecadd_8.ndb
........\eecadd_8.pin
........\eecadd_8.pof
........\eecadd_8.qpf
........\eecadd_8.qsf
........\eecadd_8.qws
........\eecadd_8.rpt
........\eecadd_8.scf
........\eecadd_8.sim.rpt
........\eecadd_8.snf
........\eecadd_8.sof
........\EECADD_8.sym
........\eecadd_8.tan.rpt
........\eecadd_8.tan.summary
........\eecadd_8.ttf
........\eecadd_8.vhd
........\eecadd_8.vwf
........\eecadd_8_1.pof
........\LIB.DLS
........\U2825336.DLS
........\U4328350.DLS
........\U9992235.DLS