文件名称:一些VHDL源代码
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内有波形发生器,加法器,经典双进程状态机,伪随机熟产生器,相应加法器的测试向量,16×8bit RAM,FIFO,通用RAM等源程序-within waveform generator, Adder, classic dual-process state machine, cooked pseudo-random generator, the corresponding Adder test vector, 16 x 8bit RAM, FIFO, etc. source generic RAM
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一些VHDL源代码
..............\其他设计举例
..............\............\Pelican Crossing控制器.txt
..............\............\一个游戏程序.txt
..............\............\一个简单的UART.txt
..............\............\伪随机比特发生器.txt
..............\............\布斯乘法器.txt
..............\............\棋类比赛计时时钟.txt
..............\............\步进电机控制器.txt
..............\............\用ROM实现的波形发生器.txt
..............\............\直流电机控制器.txt
..............\存储器
..............\......\16x8bit RAM.txt
..............\......\FIFO.txt
..............\......\通用RAM.txt
..............\时序逻辑
..............\........\各种功能的计数器.txt
..............\........\四D触发器:74175.txt
..............\........\带load、clr等功能的寄存器.txt
..............\........\带三态输出的8位D寄存器:74374(注2).txt
..............\........\模16计数器(使用JK触发器)(注1).txt
..............\........\用状态机实现的计数器.txt
..............\........\移位寄存器:74164.txt
..............\........\简单的12位寄存器.txt
..............\........\简单的锁存器.txt
..............\........\通用寄存器.txt
..............\测试向量(Test Bench)
..............\......................\伪随机数产生器.txt
..............\......................\加法器源程序.txt
..............\......................\波形发生器(含test beach).txt
..............\......................\相应加法器的测试向量(test bench).txt
..............\......................\经典双进程状态机(含test beach).txt
..............\组合逻辑
..............\........\8位大小比较器.txt
..............\........\8位总线接收器74245.txt
..............\........\8位相等比较.txt
..............\........\LED七段译码.txt
..............\........\三人表决器.doc
..............\........\加法器描述.txt
..............\........\双2-4译码器 74139.txt
..............\........\地址译码器.txt
..............\........\多路选择器if else.txt
..............\........\多路选择器select.txt
..............\........\多路选择器when.txt
..............\........\最高优先译码器.txt
..............\........\汉明纠错编码器.txt
..............\........\汉明纠错译码器1.txt
..............\其他设计举例
..............\............\Pelican Crossing控制器.txt
..............\............\一个游戏程序.txt
..............\............\一个简单的UART.txt
..............\............\伪随机比特发生器.txt
..............\............\布斯乘法器.txt
..............\............\棋类比赛计时时钟.txt
..............\............\步进电机控制器.txt
..............\............\用ROM实现的波形发生器.txt
..............\............\直流电机控制器.txt
..............\存储器
..............\......\16x8bit RAM.txt
..............\......\FIFO.txt
..............\......\通用RAM.txt
..............\时序逻辑
..............\........\各种功能的计数器.txt
..............\........\四D触发器:74175.txt
..............\........\带load、clr等功能的寄存器.txt
..............\........\带三态输出的8位D寄存器:74374(注2).txt
..............\........\模16计数器(使用JK触发器)(注1).txt
..............\........\用状态机实现的计数器.txt
..............\........\移位寄存器:74164.txt
..............\........\简单的12位寄存器.txt
..............\........\简单的锁存器.txt
..............\........\通用寄存器.txt
..............\测试向量(Test Bench)
..............\......................\伪随机数产生器.txt
..............\......................\加法器源程序.txt
..............\......................\波形发生器(含test beach).txt
..............\......................\相应加法器的测试向量(test bench).txt
..............\......................\经典双进程状态机(含test beach).txt
..............\组合逻辑
..............\........\8位大小比较器.txt
..............\........\8位总线接收器74245.txt
..............\........\8位相等比较.txt
..............\........\LED七段译码.txt
..............\........\三人表决器.doc
..............\........\加法器描述.txt
..............\........\双2-4译码器 74139.txt
..............\........\地址译码器.txt
..............\........\多路选择器if else.txt
..............\........\多路选择器select.txt
..............\........\多路选择器when.txt
..............\........\最高优先译码器.txt
..............\........\汉明纠错编码器.txt
..............\........\汉明纠错译码器1.txt