文件名称:an181
- 所属分类：
- Linux/Unix编程
- 资源属性：
- [C/C++] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 804kb
- 下载次数：
- 0次
- 提 供 者：
- 梁*
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
altera epxa1的例子程序-ALTERA epxa1 examples of procedures
(系统自动生成,下载前可以参看下载内容)
下载文件列表
an181_2_2.pdf
example_designs
...............\multimaster_ahb
...............\...............\ads
...............\...............\...\debug.fsf
...............\...............\...\embedded_stripe.bsf
...............\...............\...\embedded_stripe.h
...............\...............\...\embedded_stripe.s
...............\...............\...\embedded_stripe.v
...............\...............\...\embedded_stripe_bb.v
...............\...............\...\memmap.v
...............\...............\...\multi_master_reference_design.csf
...............\...............\...\multi_master_reference_design.esf
...............\...............\...\multi_master_reference_design.psf
...............\...............\...\multi_master_reference_design.quartus
...............\...............\...\multi_master_reference_design.sbd
...............\...............\...\multi_master_reference_design.ssf
...............\...............\...\powerkit.tcl
...............\...............\...\powerkit_lib.tcl
...............\...............\...\release.fsf
...............\...............\...\sbd2sim.bat
...............\...............\...\simulation
...............\...............\...\..........\modelsim
...............\...............\...\..........\........\bus_translate.bat
...............\...............\...\..........\........\compile_and_run_rtl_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_rtl_fullmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_fullmodel_v.do
...............\...............\...\..........\........\input.dat
...............\...............\...\..........\........\modelsim.mpf
...............\...............\...\..........\........\slavememory.0.dat
...............\...............\...\..........\........\slavememory.cfg.dat
...............\...............\...\..........\........\wave_interconnect_matrix.do
...............\...............\...\..........\........\wave_rtl_bfm.do
...............\...............\...\..........\........\wave_rtl_fullstripe.do
...............\...............\...\..........\........\wave_timing_busfuncmodel.do
...............\...............\...\..........\........\wave_timing_fullstripe.do
...............\...............\...\software
...............\...............\...\........\multi_master_reference_design.s
...............\...............\gnu
...............\...............\...\debug.fsf
...............\...............\...\embedded_stripe.bsf
...............\...............\...\embedded_stripe.h
...............\...............\...\embedded_stripe.s
...............\...............\...\embedded_stripe.v
...............\...............\...\embedded_stripe_bb.v
...............\...............\...\memmap.v
...............\...............\...\multi_master_reference_design.csf
...............\...............\...\multi_master_reference_design.esf
...............\...............\...\multi_master_reference_design.psf
...............\...............\...\multi_master_reference_design.quartus
...............\...............\...\multi_master_reference_design.sbd
...............\...............\...\multi_master_reference_design.ssf
...............\...............\...\powerkit.tcl
...............\...............\...\powerkit_lib.tcl
...............\...............\...\release.fsf
...............\...............\...\sbd2sim.bat
...............\...............\...\simulation
...............\...............\...\..........\modelsim
...............\...............\...\..........\........\compile_and_run_rtl_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_rtl_fullmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_fullmodel_v.do
...............\...............\...\..........\........\input.dat
...............\...............\...\..........\........\modelsim.mpf
...........
example_designs
...............\multimaster_ahb
...............\...............\ads
...............\...............\...\debug.fsf
...............\...............\...\embedded_stripe.bsf
...............\...............\...\embedded_stripe.h
...............\...............\...\embedded_stripe.s
...............\...............\...\embedded_stripe.v
...............\...............\...\embedded_stripe_bb.v
...............\...............\...\memmap.v
...............\...............\...\multi_master_reference_design.csf
...............\...............\...\multi_master_reference_design.esf
...............\...............\...\multi_master_reference_design.psf
...............\...............\...\multi_master_reference_design.quartus
...............\...............\...\multi_master_reference_design.sbd
...............\...............\...\multi_master_reference_design.ssf
...............\...............\...\powerkit.tcl
...............\...............\...\powerkit_lib.tcl
...............\...............\...\release.fsf
...............\...............\...\sbd2sim.bat
...............\...............\...\simulation
...............\...............\...\..........\modelsim
...............\...............\...\..........\........\bus_translate.bat
...............\...............\...\..........\........\compile_and_run_rtl_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_rtl_fullmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_fullmodel_v.do
...............\...............\...\..........\........\input.dat
...............\...............\...\..........\........\modelsim.mpf
...............\...............\...\..........\........\slavememory.0.dat
...............\...............\...\..........\........\slavememory.cfg.dat
...............\...............\...\..........\........\wave_interconnect_matrix.do
...............\...............\...\..........\........\wave_rtl_bfm.do
...............\...............\...\..........\........\wave_rtl_fullstripe.do
...............\...............\...\..........\........\wave_timing_busfuncmodel.do
...............\...............\...\..........\........\wave_timing_fullstripe.do
...............\...............\...\software
...............\...............\...\........\multi_master_reference_design.s
...............\...............\gnu
...............\...............\...\debug.fsf
...............\...............\...\embedded_stripe.bsf
...............\...............\...\embedded_stripe.h
...............\...............\...\embedded_stripe.s
...............\...............\...\embedded_stripe.v
...............\...............\...\embedded_stripe_bb.v
...............\...............\...\memmap.v
...............\...............\...\multi_master_reference_design.csf
...............\...............\...\multi_master_reference_design.esf
...............\...............\...\multi_master_reference_design.psf
...............\...............\...\multi_master_reference_design.quartus
...............\...............\...\multi_master_reference_design.sbd
...............\...............\...\multi_master_reference_design.ssf
...............\...............\...\powerkit.tcl
...............\...............\...\powerkit_lib.tcl
...............\...............\...\release.fsf
...............\...............\...\sbd2sim.bat
...............\...............\...\simulation
...............\...............\...\..........\modelsim
...............\...............\...\..........\........\compile_and_run_rtl_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_rtl_fullmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_busfuncmodel_v.do
...............\...............\...\..........\........\compile_and_run_timing_fullmodel_v.do
...............\...............\...\..........\........\input.dat
...............\...............\...\..........\........\modelsim.mpf
...........