文件名称:fdivision
介绍说明－－下载内容均来自于网络，请自行研究使用
用verilog编写适中分频器
并且还有测试程序-verilog prepared with moderate frequency divider and another test procedures
并且还有测试程序-verilog prepared with moderate frequency divider and another test procedures
(系统自动生成,下载前可以参看下载内容)
下载文件列表
fdivision
.........\fdiv.cr.mti
.........\fdiv.mpf
.........\fdiv.v
.........\fdivt.v
.........\modelsim.ini
.........\transcript
.........\vish_stacktrace.vstf
.........\vsim.wlf
.........\work
.........\....\fdivision
.........\....\.........\verilog.asm
.........\....\.........\_primary.dat
.........\....\.........\_primary.vhd
.........\....\fdivt
.........\....\.....\verilog.asm
.........\....\.....\_primary.dat
.........\....\.....\_primary.vhd
.........\....\_info
.........\fdiv.cr.mti
.........\fdiv.mpf
.........\fdiv.v
.........\fdivt.v
.........\modelsim.ini
.........\transcript
.........\vish_stacktrace.vstf
.........\vsim.wlf
.........\work
.........\....\fdivision
.........\....\.........\verilog.asm
.........\....\.........\_primary.dat
.........\....\.........\_primary.vhd
.........\....\fdivt
.........\....\.....\verilog.asm
.........\....\.....\_primary.dat
.........\....\.....\_primary.vhd
.........\....\_info