文件名称:hdb3_verilog
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modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
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(系统自动生成,下载前可以参看下载内容)
下载文件列表
hdb3
....\decode.v
....\decode.v.bak
....\hdb3.cr.mti
....\hdb3.mpf
....\testbench.v
....\testbench.v.bak
....\vsim.wlf
....\work
....\....\decode
....\....\......\verilog.asm
....\....\......\_primary.dat
....\....\......\_primary.vhd
....\....\testbench
....\....\.........\verilog.asm
....\....\.........\_primary.dat
....\....\.........\_primary.vhd
....\....\_info
....\decode.v
....\decode.v.bak
....\hdb3.cr.mti
....\hdb3.mpf
....\testbench.v
....\testbench.v.bak
....\vsim.wlf
....\work
....\....\decode
....\....\......\verilog.asm
....\....\......\_primary.dat
....\....\......\_primary.vhd
....\....\testbench
....\....\.........\verilog.asm
....\....\.........\_primary.dat
....\....\.........\_primary.vhd
....\....\_info