文件名称:Altera_uart_VHDL
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FPGA/CPLD应用,uart通讯VHDL原码.-FPGA/CPLD applications, UART communications VHDL source.
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下载文件列表
address_decode_rtl.vhd
clock_divider.v
control_operation_fsm.vhd
cpu_interface_rtl.vhd
serial_interface_rtl.vhd
status_registers_rtl.vhd
tester.v
uart_tb.v
uart_top_rtl.vhd
xmit_rcv_control_fsm.vhd
clock_divider.v
control_operation_fsm.vhd
cpu_interface_rtl.vhd
serial_interface_rtl.vhd
status_registers_rtl.vhd
tester.v
uart_tb.v
uart_top_rtl.vhd
xmit_rcv_control_fsm.vhd