文件名称:usb_phy
介绍说明－－下载内容均来自于网络，请自行研究使用
usb接口协议。It was tested with a USB 1.1 core I have written on
a XESS XCV800 board with a a Philips PDIUSBP11A transceiver.
a XESS XCV800 board with a a Philips PDIUSBP11A transceiver.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 63535289usb_phy.rar 列表 usb_phy\CVS\Desktop_.ini usb_phy\CVS\Entries usb_phy\CVS\Repository usb_phy\CVS\Root usb_phy\doc\CVS\Desktop_.ini usb_phy\doc\CVS\Entries usb_phy\doc\CVS\Repository usb_phy\doc\CVS\Root usb_phy\doc\Desktop_.ini usb_phy\doc\README.txt usb_phy\rtl\CVS\Desktop_.ini usb_phy\rtl\CVS\Entries usb_phy\rtl\CVS\Repository usb_phy\rtl\CVS\Root usb_phy\rtl\verilog\CVS\Desktop_.ini usb_phy\rtl\verilog\CVS\Entries usb_phy\rtl\verilog\CVS\Repository usb_phy\rtl\verilog\CVS\Root usb_phy\rtl\verilog\Desktop_.ini usb_phy\rtl\verilog\timescale.v usb_phy\rtl\verilog\usb_phy.v usb_phy\rtl\verilog\usb_rx_phy.v usb_phy\rtl\verilog\usb_tx_phy.v usb_phy\rtl\Desktop_.ini usb_phy\Desktop_.ini usb_phy\rtl\verilog\CVS usb_phy\doc\CVS usb_phy\rtl\CVS usb_phy\rtl\verilog usb_phy\CVS usb_phy\doc usb_phy\rtl usb_phy