文件名称:crc_wizard_v1_1
介绍说明－－下载内容均来自于网络，请自行研究使用
用Verilog写的CRC校验程序 非常不错
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 81404613crc_wizard_v1_1.rar 列表 crc_wizard_v1_1\examples\crc_sample.vhd crc_wizard_v1_1\examples\frame_check.vhd crc_wizard_v1_1\examples\frame_gen.vhd crc_wizard_v1_1\readme.txt crc_wizard_v1_1\src\crc_components_pkg.vhd crc_wizard_v1_1\src\crc_functions_pkg.vhd crc_wizard_v1_1\src\crc_wizard_v1_1.vhd crc_wizard_v1_1\src\data_ds_modules.vhd crc_wizard_v1_1\src\rxcrc.vhd crc_wizard_v1_1\src\state_machine_rx.vhd crc_wizard_v1_1\src\state_machine_tx.vhd crc_wizard_v1_1\src\txcrc.vhd crc_wizard_v1_1\src\V5CRC.vhd crc_wizard_v1_1\testbench\llcrc_loop_tb.vhd crc_wizard_v1_1\testbench\modelsim.ini crc_wizard_v1_1\testbench\run_crc_sim.pl crc_wizard_v1_1\testbench\sample_test.do crc_wizard_v1_1\testbench\sample_test.do.bak crc_wizard_v1_1\testbench\sample_wave.do crc_wizard_v1_1\testbench\simprim\_info crc_wizard_v1_1\testbench\unisim\_info crc_wizard_v1_1\testbench\vsim.wlf crc_wizard_v1_1\testbench\work\crc_components\_primary.dat crc_wizard_v1_1\testbench\work\crc_components\_vhdl.asm crc_wizard_v1_1\testbench\work\crc_functions\body.asm crc_wizard_v1_1\testbench\work\crc_functions\body.dat crc_wizard_v1_1\testbench\work\crc_functions\_primary.dat crc_wizard_v1_1\testbench\work\crc_functions\_vhdl.asm crc_wizard_v1_1\testbench\work\data_ds_driv_dst\data_ds_driv_dst_arch.asm crc_wizard_v1_1\testbench\work\data_ds_driv_dst\data_ds_driv_dst_arch.dat crc_wizard_v1_1\testbench\work\data_ds_driv_dst\_primary.dat crc_wizard_v1_1\testbench\work\frame_check\rtl.asm crc_wizard_v1_1\testbench\work\frame_check\rtl.dat crc_wizard_v1_1\testbench\work\frame_check\_primary.dat crc_wizard_v1_1\testbench\work\frame_gen\rtl.asm crc_wizard_v1_1\testbench\work\frame_gen\rtl.dat crc_wizard_v1_1\testbench\work\frame_gen\_primary.dat crc_wizard_v1_1\testbench\work\llcrc_loop_tb\llcrc_loop_tb_arch.asm crc_wizard_v1_1\testbench\work\llcrc_loop_tb\llcrc_loop_tb_arch.dat crc_wizard_v1_1\testbench\work\llcrc_loop_tb\_primary.dat crc_wizard_v1_1\testbench\work\rx_crc\rx_crc_arch.asm crc_wizard_v1_1\testbench\work\rx_crc\rx_crc_arch.dat crc_wizard_v1_1\testbench\work\rx_crc\_primary.dat crc_wizard_v1_1\testbench\work\state_machine_dst\state_machine_dst_arch.asm crc_wizard_v1_1\testbench\work\state_machine_dst\state_machine_dst_arch.dat crc_wizard_v1_1\testbench\work\state_machine_dst\_primary.dat crc_wizard_v1_1\testbench\work\state_machine_rx\state_machine_rx_arch.asm crc_wizard_v1_1\testbench\work\state_machine_rx\state_machine_rx_arch.dat crc_wizard_v1_1\testbench\work\state_machine_rx\_primary.dat crc_wizard_v1_1\testbench\work\tx_crc\tx_crc_arch.asm crc_wizard_v1_1\testbench\work\tx_crc\tx_crc_arch.dat crc_wizard_v1_1\testbench\work\tx_crc\_primary.dat crc_wizard_v1_1\testbench\work\v5_crc\rtl.asm crc_wizard_v1_1\testbench\work\v5_crc\rtl.dat crc_wizard_v1_1\testbench\work\v5_crc\_primary.dat crc_wizard_v1_1\testbench\work\_info crc_wizard_v1_1\ucf\crc_sample.ucf crc_wizard_v1_1\ug189.pdf crc_wizard_v1_1\work\_info crc_wizard_v1_1\testbench\work\crc_components crc_wizard_v1_1\testbench\work\crc_functions crc_wizard_v1_1\testbench\work\data_ds_driv_dst crc_wizard_v1_1\testbench\work\frame_check crc_wizard_v1_1\testbench\work\frame_gen crc_wizard_v1_1\testbench\work\llcrc_loop_tb crc_wizard_v1_1\testbench\work\rx_crc crc_wizard_v1_1\testbench\work\state_machine_dst crc_wizard_v1_1\testbench\work\state_machine_rx crc_wizard_v1_1\testbench\work\tx_crc crc_wizard_v1_1\testbench\work\v5_crc crc_wizard_v1_1\testbench\simprim crc_wizard_v1_1\testbench\unisim crc_wizard_v1_1\testbench\work crc_wizard_v1_1\work\_temp crc_wizard_v1_1\examples crc_wizard_v1_1\src crc_wizard_v1_1\testbench crc_wizard_v1_1\ucf crc_wizard_v1_1\work crc_wizard_v1_1