文件名称:pcie_ml555x4_prj
介绍说明－－下载内容均来自于网络，请自行研究使用
已经在xilinx的ML555开发板上实现的PCIEx4的设计，其中带有DMA功能。满足pciexpress1.0规范。
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下载文件列表
压缩包 : 23825726pcie_ml555x4_prj.rar 列表 pcie_ml555x4_prj\ml555cg\coregen.log pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\doc\pcie_blk_plus_ds551.pdf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\doc\pcie_blk_plus_gsg343.pdf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\doc\pcie_blk_plus_ug341.pdf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_64.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_64_RX_ENGINE.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_64_TX_ENGINE.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_EP.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_EP_MEM.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_EP_MEM_ACCESS.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_INTR_CTRL.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\BMD_TO_CTRL.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\EP_MEM.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\pci_exp_4_lane_64b_ep.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\pci_exp_64b_app.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\xilinx_pci_exp_4_lane_ep.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\xilinx_pci_exp_4_lane_ep_product.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design\xilinx_pci_exp_blk_plus_4_lane_ep_xc5vlx50t-ff1136-1.ucf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\coregen.log pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\implement.sh pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\make_ace.sh pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\ml555xcf32p.cfi pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\ml555xcf32p.mcs pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\ml555xcf32p.prm pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\ml555xcf32p.sig pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\ml555_prom.sh pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\novas.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\pcie_ace.cmd pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\pcie_x1_plus_v1_5es_imp.ace pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\mapped.map pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\mapped.mrp pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\mapped.ncd pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\mapped.pcf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\netlist.lst pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.bgn pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.bit pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.drc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.nlf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.pad pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.par pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.twr pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.unroutes pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed.xpi pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed_pad.csv pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\routed_pad.txt pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results\timing.twr pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\xilinx_pci_exp_4_lane_ep_inc.xst pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\xst.scr pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\xst.srp pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\_impactbatch.log pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\pcie_blk_plus_release_notes.txt pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\board.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\board_common.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\dsport_cfg.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_4_lane_64b_dsport.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_expect_tasks.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_usrapp_cfg.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_usrapp_com.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_usrapp_rx.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\pci_exp_usrapp_tx.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\xilinx_pci_exp_downstream_port.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport\xilinx_pci_exp_dsport.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\functional\board_rtl_x04.f pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\functional\board_rtl_x04_ncv.f pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\functional\xilinx_lib_mti.f pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\bmd_pcie.cr.mti pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\debussy.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\error.dat pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\interrupt.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\interrupt_1.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\libpli.so pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\lib_build.bat pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\modelsim.ini pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\novas.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\run.f pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\rx.dat pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\simulate_mti.do pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\transcript pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\tx.dat pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\usapp_tx_rx.rc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas\vsim.wlf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\sim_define.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\sys_clk_gen.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\sys_clk_gen_ds.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\BMD_cfg_tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\BMD_rd_tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\BMD_rd_wr_tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\BMD_wr_tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\pio_tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\sample_tests1.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests\tests.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\vsim.wlf pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\xilinx_pci_exp_cor_ep.f pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\xilinx_pci_exp_defines.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5.ngc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5.v pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5.veo pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5.xco pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5_flist.txt pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5_pcie_blk_plus_gen_1.lso pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5_xmdf.tcl pcie_ml555x4_prj\ml555cg\ml555cg.cgp pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement\results pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\dsport pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\functional pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\novas pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation\tests pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\doc pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\example_design pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\implement pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5\simulation pcie_ml555x4_prj\ml555cg\endpoint_blk_plus_v1_5 pcie_ml555x4_prj\ml555cg pcie_ml555x4_prj