文件名称:clock_1
介绍说明--下载内容均来自于网络,请自行研究使用
简易数字钟,使用VHDL语言编辑,简单设计,容易学习用
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 29782196clock_1.rar 列表 clock_1\clock_1.asm.rpt clock_1\clock_1.cdf clock_1\clock_1.done clock_1\clock_1.dpf clock_1\clock_1.fit.rpt clock_1\clock_1.fit.smsg clock_1\clock_1.fit.summary clock_1\clock_1.flow.rpt clock_1\clock_1.map.rpt clock_1\clock_1.map.summary clock_1\clock_1.merge.rpt clock_1\clock_1.pin clock_1\clock_1.pof clock_1\clock_1.qpf clock_1\clock_1.qsf clock_1\clock_1.qws clock_1\clock_1.sdc clock_1\clock_1.sim.rpt clock_1\clock_1.sof clock_1\clock_1.sta.rpt clock_1\clock_1.sta.summary clock_1\clock_1.tan.rpt clock_1\clock_1.tan.summary clock_1\clock_1.vhd clock_1\clock_1.vht clock_1\clock_1.vwf clock_1\clock_1_assignment_defaults.qdf clock_1\db\clock_1.(0).cnf.cdb clock_1\db\clock_1.(0).cnf.hdb clock_1\db\clock_1.asm.qmsg clock_1\db\clock_1.asm_labs.ddb clock_1\db\clock_1.cbx.xml clock_1\db\clock_1.cmp.cdb clock_1\db\clock_1.cmp.ecobp clock_1\db\clock_1.cmp.hdb clock_1\db\clock_1.cmp.logdb clock_1\db\clock_1.cmp.rdb clock_1\db\clock_1.cmp.tdb clock_1\db\clock_1.cmp0.ddb clock_1\db\clock_1.cmp2.ddb clock_1\db\clock_1.cmp_bb.cdb clock_1\db\clock_1.cmp_bb.dfp clock_1\db\clock_1.cmp_bb.hdb clock_1\db\clock_1.cmp_bb.logdb clock_1\db\clock_1.cmp_bb.rcf clock_1\db\clock_1.dbp clock_1\db\clock_1.db_info clock_1\db\clock_1.eco.cdb clock_1\db\clock_1.eds_overflow clock_1\db\clock_1.fit.qmsg clock_1\db\clock_1.fnsim.hdb clock_1\db\clock_1.fnsim.qmsg clock_1\db\clock_1.hier_info clock_1\db\clock_1.hif clock_1\db\clock_1.map.cdb clock_1\db\clock_1.map.ecobp clock_1\db\clock_1.map.hdb clock_1\db\clock_1.map.logdb clock_1\db\clock_1.map.qmsg clock_1\db\clock_1.map_bb.logdb clock_1\db\clock_1.merge.qmsg clock_1\db\clock_1.pre_map.cdb clock_1\db\clock_1.pre_map.hdb clock_1\db\clock_1.psp clock_1\db\clock_1.pss clock_1\db\clock_1.rtlv.hdb clock_1\db\clock_1.rtlv_sg.cdb clock_1\db\clock_1.rtlv_sg_swap.cdb clock_1\db\clock_1.sgdiff.cdb clock_1\db\clock_1.sgdiff.hdb clock_1\db\clock_1.signalprobe.cdb clock_1\db\clock_1.sim.cvwf clock_1\db\clock_1.sim.hdb clock_1\db\clock_1.sim.qmsg clock_1\db\clock_1.sim.rdb clock_1\db\clock_1.sim_ori.vwf clock_1\db\clock_1.sld_design_entry.sci clock_1\db\clock_1.sld_design_entry_dsc.sci clock_1\db\clock_1.syn_hier_info clock_1\db\clock_1.tan.qmsg clock_1\db\clock_2.db_info clock_1\db\clock_2.eco.cdb clock_1\db\clock_2.sld_design_entry.sci clock_1\db\mux_0kc.tdf clock_1\db\mux_5kc.tdf clock_1\db\mux_klc.tdf clock_1\db\mux_llc.tdf clock_1\db\wed.wsf clock_1\db\wed.zsf clock_1\db clock_1